Heterojunction bipolar transistors with sloped regions

Details Heterojunction bipolar transistors with sloped regions Heterojunction bipolar transistors with sloped regions

1993-01-21

1995-02-07

Limanek, Robert P.

Active solid-state devices (e.g., transistors, solid-state diode

Heterojunction device

Bipolar transistor

257198, 257618, 257622, H01L 2973, H01L 27102

Patent

active

053878086

ABSTRACT:
The present invention is directed toward a heterojunction bipolar transistor integrated circuit in which the collector layers of two heterojunction bipolar transistors are provided on a semi-insulating substrate. The collector layers have at least one surface that is sloped relative to the substrate. Base layers are provided on the sloped portions a common emitter layer is provided in contact with the base layers. Alternatively, the common emitter layer is provided on the substrate and etched to form to sloped surface thereon. Base and collector layers are then formed on the sloped surfaces of the common emitter layer.

REFERENCES:
patent: 5144376 (1992-09-01), Kweon
"MBE Growth of III-V compound heterostructures on Channeled GaAs Substrates", S. Shimomura et al., The Japan Society of Applied Physics and Related Societies, Extended Abstracts (The 39th Spring Meeting), p. 1261, 1992.
"MBE growth of GaAs/AlAs double-barrier structures on GaAs channeled substrates", S. Shimomura et al., Journal of Crystal Growth 111, pp. 1105-1109, 1991.

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