Heterojunction bipolar transistor with inversion layer base

Details Heterojunction bipolar transistor with inversion layer base Heterojunction bipolar transistor with inversion layer base

1987-03-27

1989-03-07

Edlow, Martin H.

357 16, 357 15, 357 59, H01L 2972

Patent

active

048110701

ABSTRACT:
A semiconductor device comprises a first semiconductor region having formed thereon a second semiconductor region which forms at its one surface an energy barrier with respect to minority carriers of the first semiconductor region, a conductive region in contact with the other surface of the second semiconductor region, and an induced layer formed in the operating state in a surface portion of the first semiconductor region in contact with the second semiconductor region under the conductive region, the carriers being transported across the induced layer to the first semiconductor region, whereby the conductive region acts as an emitter, the induced layer acts as a base and the first semiconductor layer acts as a collector of a transistor.

REFERENCES:
patent: 4127861 (1978-11-01), Deneuville
patent: 4380774 (1983-04-01), Yoder
patent: 4670767 (1987-06-01), Ohta
patent: 4686550 (1987-08-01), Capasso et al.
patent: 4691215 (1987-09-01), Luryi
Hayashi et al., "MIS Tunnel Emiher Transistor", Extended Abstracts (The 45th Autumn Meeting, 1984), The Japan Society of Applied Physics, Oct. 12, 1984, p. 6.407.
"Heterojunction Emitter Multiplies Transistors Current Gains by 50," Electronics, Oct. 25, 1979, p. 6.68.
"Heterojunction FET", IBM Technical Disclosure Bulletin, vol. 29, No. 1, Jun. 1986, pp. 471-472.

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