Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Reexamination Certificate
2002-02-14
2004-09-28
Kang, Donghee (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
C257S198000, C257S571000, C257S586000, C257S642000, C438S235000, C438S309000, C438S312000, C438S313000
Reexamination Certificate
active
06797995
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to Indium Phosphide based heterojunction bipolar transistors (HBTs), and more particularly to high power HBTs with an InP sub-collector.
2. Description of the Related Art
HBTs are described in general in Wang, “Introduction to Semiconductor Technology: GaAs and Related Compounds”, John Wiley & Sons, 1990, pp. 170-230. Various material families have been employed for such devices. See, for example, the article “AlGaAs/GaAs HBTs for Analog and Digital Applications” in Chang, ed., “Current Trends in Heterojunction Bipolar Transistors”, World Scientific Publishing Co. Pte. Ltd., 1996, pp. 59-98.
For InP substrates, HBTs have used an InP emitter, InGaAs base, and either an InGaAs collector and sub-collector, with the sub-collector heavily doped N+ to function as a contact for the collector, or an InP collector with either a heavily doped InGaAs or an InP sub-collector. The first device, with the InGaAs collector, is referred to as a single HBT (SHBT) because it has only one interface between materials with differing bandgaps. (This interface is called the InP/InGaAs emitter-base “hetero-junction”). The second device is called a double HBT (DHBT) because it has two hetero-junctions (the InP/InGaAs emitter-base junction and the InGaAs/InP base-collector junction). The SHBT is generally easier to fabricate but has a relatively low breakdown voltage and a limited power dissipation capacity, thus restricting its use to relatively low power applications. While more difficult to fabricate, the DHBT has a higher breakdown voltage and its InP collector has a thermal conductivity of about 0.7 W/cm° C., or approximately seven times that of InGaAs. Thus, DHBTs can be used for high power applications. However, whereas the specific contact resistance between a metal contact and the InGaAs sub-collector in a SHBT is quite low, it is difficult to establish a low resistance contact from a metal to the InP sub-collector of a DHBT due to the alignment of the InP bandgap.
SUMMARY OF THE INVENTION
The present invention seeks to provide an HBT which has an inherently low metal contact resistance to the sub-collector, a sub-collector with good thermal conductivity, and improved fabrication and electrical isolation techniques for such devices.
These goals are achieved by fabricating an HBT with a thick InP sub-collector and a thin, low resistance InGaAs “contact” layer placed between the InP collector and the InP sub-collector layers. The InGaAs contact layer provides a low resistance contact to metal, but is thin enough (not thicker than about 500 Angstroms and preferably about 100-200 Angstroms) so that it permits a high degree of thermal conduction from the collector to the sub-collector, thereby allowing for higher power dissipation from the device.
The substance of the invention (an improved InP sub-collector system consisting of a thin InGaAs n+ layer on a thicker InP n+ layer) is also useful for SHBTs. Although power dissipated in a SHBT is low, device junction temperatures would rise to intolerable high levels if a simple sub-collector of a single InGaAs thick layer were used. The thermal conductivity of InGaAs is too low.
The addition of an InGaAs contact layer offers a fabrication benefit for DHBTs, in that it can be used as an etch stop to protect the sub-collector when the collector layer of the HBT is etched to a desired geometry. A more planar device can also be achieved by rendering the InP sub-collector area surrounding the transistor electrically insulating, preferably by an ion implant, thereby avoiding the need to etch that sub-collector area away to achieve device isolation.
These and other features and advantages of the invention will be apparent to those skilled in the art from the following detailed description, taken together with the accompanying drawings.
REFERENCES:
patent: 5041882 (1991-08-01), Katoh
patent: 6376867 (2002-04-01), Gutierrez-Aitken et al.
patent: 6403436 (2002-06-01), Tanomura
patent: 6406965 (2002-06-01), Lammert
patent: 6583455 (2003-06-01), Micovic et al.
patent: 2001/0015474 (2001-08-01), Blayac et al.
Wang, “Introduction to Semiconductor Technology: GaAs and Related Compounds”, John Wiley & Sons, 1990, pp. 170-230.
“AlGaAs/GaAs HBTs for Analog and digital Application” in Chang, ed., “Current Trends in Heterojunction Bipolar Transistors”, World Scientific Publishing Co. Pte, Ltd., 1996, pp. 59-98.
William Liu, “Fundamentals of III-V Devices HBTs, MESFETs, and HFETs/HEMTs”, John Wiley & Sons, Inc., 1999, pp. 153, 171.
Brar Berinder P. S.
Higgins John A.
Li James Chingwei
Pierson, Jr. Richard L.
Kang Donghee
Koppel, Jacobs Patrick & Heybl
Rockwell Scientific Licensing LLC
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