Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor
Reexamination Certificate
2000-03-01
2002-08-20
Ho, Hoai V. (Department: 2818)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Bipolar transistor
C257S592000, C438S235000
Reexamination Certificate
active
06437376
ABSTRACT:
BACKGROUND OF THE INVENTION
This invention generally concerns Heterojunction Bipolar Transistors (HBT)s and, more particularly, a HBT device with an intrinsic, merged growth base electrode contact formed through the selective deposition of silicon germanium (SiGe) in the base region.
Rapid progress has occurred in the development of high performance bipolar and BiCMOS integrated circuits for applications such as high speed data and RF wireless communications. SiGe heterojunction bipolar technology offers economically feasible solutions with comparable performance characteristics to III-V technologies. The critical performance criteria include high frequency performance, low noise at both low and high frequency, sufficiently high intrinsic gain, and high breakdown voltages.
The integration of SiGe into the silicon bipolar base processing has been of interest because of the resulting improvements in electrical properties such as transmit frequency (Ft), Early voltage (Va), and collector-to-emitter breakdown (BVceo). The band gap at the collector side can be reduced by substituting germanium (Ge) for silicon (Si) in the base region of a bipolar transistor. This results in an electric field in the base, which reduces the majority carriers transit time. SiGe films can be integrated into silicon processing with much less difficulty than other materials. However, even the use of structurally similar materials, such as Si and Ge, results in lattice mismatches on the crystal boundary area. Further, the formation of very thin base regions is complicated by the fact that boron implantation, even at an energy as low as 5 Kev, can still penetrate 1000 Å into the base collector junction.
Different techniques have been proposed to integrate SiGe into the base of a bipolar device. These techniques are classified into two categories: blanket SiGe film deposition and selective SiGe film deposition. The blanket SiGe deposition method produces less silicon defects, and, therefore, higher yields. Thin, heavily doped, film can be produced with this method using growth rates of 25 to 100 Å per minute. However, blanket deposition processes are difficult to integrate into standard bipolar fabrication processes. Undesired areas of SiGe cannot easily be etched away without damaging the thin, intended base region. Although nonselective deposition is less complicated in terms of nucleation, microloading effects and faceting, it has to be done at an earlier state in the front-end fabrication sequence for patterning purposes. The stability of the film is frequently compromised due to the number of thermal cycling and etching steps, causing excessive dopant out-diffusion and defect formation.
Alternately, selective deposition techniques can be used to form base electrode and base region underlying the emitter. Selective deposition processes can be used to grow SiGe only on silicon areas, so that the process is self-aligned. Selective deposition can be done at a later stage which makes its integration much less complicated. The process is less complicated because post deposition patterning is not required, the process is self-aligned, and extraneous thermal cycles are avoided. Although selective SiGe film deposition is conceptually simple, there are problems concerning the connection of the SiGe base to the base electrodes, and with defect formation near the emitter-base junction. However, if these particular problems could be solved, the selective deposition of SiGe in the fabrication of HBTs would result in higher yields and better electrical performance.
It would be advantageous if an HBT base region could be reliably fabricated using a selective SiGe deposition, at a later stage in the fabrication sequence, to minimize exposure of the SiGe layer to undesired heat cycles and chemical processes.
It would be advantageous if a SiGe base could be self-aligned, and formed without the necessity of post-deposition patterning.
It would be advantageous if a selectively deposited SiGe base could be formed subsequent to the formation of the base electrode layer, so as to avoid annealing and chemical etch processes which degrade a SiGe film.
It would be advantageous if a selectively deposited SiGe base could be protected during the formation of the emitter window to prevent defects along the emitter-base junction.
It would be advantageous if contacts could be formed between a silicon base electrode and a selectively deposited SiGe bas region without the requirement of special processes or extrinsic connections.
SUMMARY OF THE INVENTION
Accordingly, a method for fabricating a Heterojunction Bipolar Transistor (HBT) is provided comprising:
forming a silicon base electrode insulated from a collector;
forming an emitter window through the silicon base electrode and insulator, exposing the collector region;
selectively depositing silicon germanium (SiGe) in the emitter window; and
forming a SiGe three-dimensional contact from the base region to the base electrode.
Preceding the formation of the base electrode, a gate oxide layer is deposited overlying the collector. Further processes deposit a first layer of oxide overlying the gate oxide layer, forming the insulator separating the collector from the base electrode. Then, the formation of the HBT comprises:
pattern etching the base electrode to reveal an area of the first oxide layer and exposing base electrode sidewall surfaces; and
pattern etching to remove the first oxide layer and gate oxide layer, revealing a collector region and forming oxide sidewalls.
growing SiGe on the collector top surface;
growing SiGe on exposed base electrode sidewalls;
merging the SiGe grown on the collector with the SiGe grown on the base electrode sidewall across the oxide sidewalls. The SiGe merger creates a vertical bridge contact between the areas of grown SiGe.
Optionally, the selective deposition of SiGe, includes forming a bottom cap layer of silicon to separate the collector from the SiGe bottom surface; and
following the selective deposition of SiGe, depositing a top cap layer of silicon overlying the SiGe top surface, forming the base region top surface.
Further processes comprise:
forming a protective oxide layer overlying the base region top surface;
forming dielectric sidewalls;
removing the protective oxide layer overlying the intrinsic base region after the formation of the dielectric sidewalls; and
forming an emitter.
A Heterojunction Bipolar Transistor is also provided comprising a lightly doped collector region and a base region including silicon germanium (SiGe). A base electrode overlies the collector, and a three-dimension SiGe contact connects the base region and the base electrode. A protective oxide layer temporarily overlies the base region.
A first oxide layer has sidewalls adjacent the base region, and the three-dimensional SiGe contact is formed along the gate oxide and first oxide layer sidewalls. The three-dimensional contact includes a first SiGe interface to the collector top surface, a second SiGe interface to the base electrode sidewalls, and a vertical bridge merging the first and second SiGe interfaces adjacent the oxide sidewalls.
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A. Samelis et al, “Large-Signal Characteristics of InP-Based Heterojunction Bipolar Transistors and Opto-electronic Cascode Transimpedance Amplifiers”,IEEE Trans. On Electron Devices, vol. 43, No. 12, 12/96.
K. Washio et al, “95GHz fTSelf-Aligned Selective Epitaxial SiGe HBT with SMI Electrodes”ISSCC / © IEEE1998, p. 19-6-1 to 19.6-11.
Presentation by Prof. John D. Cressler, “Silicon-Germanium Microelectronics: The Next Leap in Silicon?”IEEE
Applied Micro Circuits Corporation
Gray Cary Ware & Freidenrich
Ho Hoai V.
Huynh Andy
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