Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Having graded composition
Reexamination Certificate
2000-06-23
2002-06-25
Tran, Minh Loan (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Heterojunction device
Having graded composition
Reexamination Certificate
active
06410945
ABSTRACT:
CROSS-REFERENCE TO RELATED APPLICATION
This application is related to Japanese Patent Application No. HEI11(1999)-180138 filed on Jun. 25, 1999, whose priority is claimed under 35 USC § 119, the disclosure of which is incorporated by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a heterojunction bipolar transistor usable in a MMIC (monolithic microwave integrated circuit) for a portable telephone and its manufacturing process.
2. Description of Related Art
One problem of heterojunction bipolar transistors for power supply has been a thermal runaway. The thermal runaway means a phenomenon of breakdown of a heterojunction bipolar transistor by positive feed-back of heat. During operation of the heterojunction bipolar transistor, heat is generated by a collector current. This heat increases the collector current, which further generates heat, and so on. This is the positive feed-back of heat.
For preventing the thermal runaway, it is known to change the composition ratio of aluminum in an AlGaAs emitter layer and to provide a ballast resistor.
A conventional AlGaAs/GaAs heterojunction bipolar transistor is now explained.
Japanese Unexamined Patent Publication No. HEI 7(1995)-7013 proposes a heterojunction bipolar transistor having an emitter layer of n-Al
X
Ga
1−X
As wherein an Al composition ratio X is larger than 0.4. According to this transistor, the emitter layer acts as an emitter and also acts as a ballast resistor, and thereby, electrons in an X-valley which have a great effective mass can be used. Consequently, electron mobility can be decreased and an emitter resistance (Re) can be effectively raised while keeping the Al
X
Ga
1−X
As emitter layer in a practical thickness.
However, in this transistor, since the emitter resistance (Re) is raised by adjusting the Al composition ratio X in the n-Al
X
Ga
1−X
As emitter layer, the emitter resistance (Re) is already high before the collector current increases and the characteristics of the transistor may be degraded.
Japanese Examined Patent Publication No. 2662039 discloses the formation of an n-GaAs resistor layer on an n-AlGaAs emitter layer, which resistor is of the same electroconductivity type as the emitter layer, has a lower impurity concentration than the emitter layer, is different from the emitter in composition, and has the action of a ballast resistance. In an example of the publication, described is a transistor provided with an AlGaAs emitter layer (of 0.25 &mgr;m thickness) having an Al composition ratio of 0.3 and an n-type impurity concentration of 5×10
17
/cm
3
and an n-GaAs resistor layer (of 0.4 &mgr;m thickness) having an n-type impurity concentration of 1×10
16
/cm
3
.
Japanese Unexamined Patent Publication No. HEI 10(1998)-335345 proposes a transistor provided with a ballast resistance layer of a GaAs layer formed on an AlGaAs emitter layer and a GaAs carrier supply layer formed between the emitter layer and the ballast resistance layer, the carrier supply layer having such a carrier concentration that depletion does not occur at junction. According to this transistor, the ballast resistance layer prevents the thermal runaway of the transistor and the carrier supply layer prevents diffusion of electrons from the emitter layer having a high impurity concentration to the ballast resistance layer having a low impurity concentration. Consequently, the current-amplification factor &bgr; can be kept from dropping.
However, since these n-GaAs resistor layer and ballast resistance layer act as parasitic resistance, there is a problem that they deteriorate the characteristics of the heterojunction bipolar transistors.
Accordingly, the ballast resistance layer is desired to be such that the emitter resistance is low in a normal operation state, i.e., in a state where the temperature of the transistor is low, and the emitter resistance is high in a thermal runaway state, i.e., in a state where the temperature of the transistor is high.
In other words, the ballast resistance layer is desired to provide a high temperature coefficient of the emitter resistance (simply referred to as temperature coefficient hereinafter).
However, the conventional GaAs ballast resistance layers have a relatively low temperature coefficient, which is only about 0.001° C.
−
1.
Temperature characteristics of the emitter resistance (Re) were evaluated, for example, with a heterojunction bipolar transistor as shown in an example of Japanese Examined Patent Publication No. 2662039 which has a GaAs ballast resistance layer and an emitter area of 100 &mgr;m
2
and a transistor as proposed by Japanese Unexamined Patent Publication No. HEI10(1998)-335345 which has an emitter area of 100 &mgr;m
2
, a ballast resistance layer of GaAs on an AlGaAs emitter layer and a GaAs carrier supply layer between the emitter layer and the ballast resistance layer, the carrier supply layer having such a carrier concentration that depletion does not take place at junction.
FIG. 11
shows the temperature characteristics of the emitter resistance (Re) in these transistors. It was found that the emitter resistance (Re) changes little with temperature change and consequently acts little as negative feed-back of heat against the thermal runaway.
Japanese Unexamined Patent Publication No. HEI 6(1994)-349847 proposes a transistor which, as shown in
FIG. 16
, has a ballast resistance layer of an n-Al
X
Ga
1−X
AS layer
9
instead of a GaAs layer formed on an AlGaAs emitter layer
6
. This publication describes that the Al composition ratio X in the ballast resistance layer is preferably 0<X≦0.45. If the Al composition ratio X is within this range, an energy gap between conduction band valleys in the n-Al
X
Ga
1−X
As layer can be adjusted, so that the temperature rises in a predetermined conduction band structure, also an increased number of electrons can be thermally excited from a conduction band (&Ggr; valley) where electrons have a small effective mass to higher-level conduction bands (X valley, L valley) where electrons have a large effective mass and the electron mobility decreases. Consequently, the emitter resistance of the ballast resistance layer is low before the thermal runaway occurs and is high after the thermal runaway is induced by an increased collector current. Thus the thermal runaway of the transistor can be effectively prevented. That is, the formation of such a ballast resistance layer can suppress an increase in parasitic resistance components in the transistor and prevent the thermal runaway of the transistor.
However, in these transistors, since a base electrode is formed on the p-GaAs base layer, an insulating layer of SiN, SiO or the like is typically formed on the surface of the p-GaAs base layer. There has been a problem that the characteristics of the heterojunction bipolar transistors change because of unstableness of this insulating layer.
To cope with this problem, in Extended Abstracts of the 1994 International Conference on Solid State Devices and Materials, Yokohama, 1994, pp. 613-615 (referred to Extended Abstracts hereinafter), proposed is a transistor in which a base electrode is formed not on a p-GaAs base layer but on an n-AlGaAs emitter layer on the p-GaAs base layer.
If such a construction of the base electrode formed on the n-AlGaAs emitter layer is incorporated into the construction of Japanese Unexamined Patent Publication No. HEI 6(1994)-349847 (FIG.
15
), an n-Al
0.3
Ga
0.7
As emitter layer and an n-Al
0.35
Ga
0.65
As ballast resistance layer are sequentially formed on a p+GaAs base layer. Accordingly, it is necessary to expose the n-Al
0.3
Ga
0.7
As emitter layer by sequentially etching an n+-GaAs contact layer, a graded n-Al
Y
Ga
1−Y
As layer and an n-Al
0.35
Ga
0.65
As ballast resistance layer from a substrate surface side.
In this case, it is impossible to conduct a so-called selective etching so as to stop etching when the n-Al
0.3
Ga
0.7
As emitter layer is exposed. Accordingly a
Kinosada Toshiaki
Shinozaki Toshiyuki
Shiota Masahiro
Tsuji Hideyuki
Dickey T.
Sharp Kabushiki Kaisha
Tran Minh Loan
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