Heterojunction bipolar transistor

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Bipolar transistor

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257198, 257201, H01L 29161

Patent

active

054770661

ABSTRACT:
A heterojunction bipolar transistor includes a III-V compound semiconductor substrate having a surface; III-V compound semiconductor layers successively disposed on the surface including an InGaAs layer, an InP layer, and an InAlAs layer; and base electrodes in contact with the InGaAs layer wherein contact of the base electrodes with the InGaAs layer is coplanar with contact between the InP layer and the InGaAs layer.

REFERENCES:
patent: 4939562 (1990-07-01), Adlerstein
patent: 5001534 (1991-03-01), Lunardi et al.
patent: 5111265 (1992-05-01), Tanaka
patent: 5150185 (1992-09-01), Yamada
patent: 5172197 (1992-12-01), Nguyen et al.
patent: 5285087 (1994-02-01), Narita et al.
Greenberg et al, "A Recessed-Gate InAlAs
+ HFET With An InP Etch-Stop Layer", IEEE Electron Device Letters, vol. 13, No. 3, 1992, pp. 137-139.

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