Hetero-junction bipolar transistor and a method for...

Active solid-state devices (e.g. – transistors – solid-state diode – Heterojunction device – Having graded composition

Reexamination Certificate

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C257S198000

Reexamination Certificate

active

06888180

ABSTRACT:
This invention provides a hetero-junction bipolar transistor (HBT) in which both a base resistance and a base-collector parasitic capacitance are decreased. The HBT has a collector (C)18,a base (B)20and an emitter (E)26. The collector comprises an outer collector region and an inner collector region, a thickness of the outer collector region is greater than that of the inner region. The base comprises an intrinsic region and an extrinsic region on the outer collector region, while the intrinsic base disposed on the inner collector region. The emitter is disposed on both the intrinsic base and the extrinsic base, and has a band gap energy greater than that of the base.

REFERENCES:
patent: 5001534 (1991-03-01), Lunardi et al.
patent: 5949097 (1999-09-01), Hirata et al.
patent: 6531722 (2003-03-01), Yaegashi et al.
patent: 6717188 (2004-04-01), Aoki
patent: 10-189616 (1998-07-01), None
patent: 2000-349091 (2000-12-01), None

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