Hermetically sealing a package to include a barrier metal

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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Details

C257S684000, C257SE21513

Reexamination Certificate

active

10713253

ABSTRACT:
A method for manufacturing an electronic device includes the steps of forming a first resist pattern on a primary surface of a SAW element, the first resist pattern having openings at positions corresponding to those at which bumps and a sealing frame are to be formed, sequentially forming metals over the first resist pattern, the metals being formed into adhesion layers, barrier metal layers, and solder layers, removing the first resist pattern on the SAW element such that the bumps and the sealing frame are simultaneously formed. When the bumps and the sealing frame of the SAW element are bonded to bond electrodes of the bond substrate, the solder layers are melted and alloyed by heating.

REFERENCES:
patent: 6853067 (2005-02-01), Cohn et al.
patent: 7138293 (2006-11-01), Ouellet et al.
patent: 4-293310 (1992-10-01), None
patent: 7-283334 (1995-10-01), None
patent: 9-162690 (1997-06-01), None
patent: 2000-77970 (2000-03-01), None
patent: 2001-68580 (2001-03-01), None

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