Hermetically sealed semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

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Details

257701, 257737, 257767, H01L 23053, H01L 2348

Patent

active

055571484

ABSTRACT:
A semiconductor device which includes device bonding pads exposed through oxide windows formed in a passivation oxide layer providing electrical connections to the metallized regions, a bonding pad of a different material electrically connected to the device bonding pad through a barrier layer, and a protective layer overlying the edges of said passivation oxide layer in contact with the device to seal the edges of the protective layer and a seal formed at said windows whereby the device is protected against the environment without the necessity of a separate metal or ceramic housing.

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IBM TDB vol. 11 No. 9 2169 Etching Technique for Multilevel Metallurgy, Tsui pp. 1064-1065.

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