Hermetically sealed semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

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Details

257701, 257737, 257767, H01L 23053, H01L 2348, H01L 2352

Patent

active

056357664

ABSTRACT:
A semiconductor device which includes device bonding pads exposed through oxide windows formed in a passivation oxide layer providing electrical connections to the metallized regions, a bonding pad of a different material electrically connected to the device bonding pad through a barrier layer, and a protective layer overlying the edges of said passivation oxide layer in contact with the device to seal the edges of the protective layer and a seal formed at said windows whereby the device is protected against the environment without the necessity of a separate metal or ceramic housing.

REFERENCES:
patent: 3754168 (1973-08-01), Cunningham et al.
patent: 4268849 (1981-05-01), Gray et al.
patent: 4982265 (1991-01-01), Watanabe et al.
patent: 5557148 (1996-09-01), Cain

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