Electricity: conductors and insulators – Conduits – cables or conductors – Preformed panel circuit arrangement
Reexamination Certificate
2000-12-30
2002-07-02
Paladini, Albert W. (Department: 2827)
Electricity: conductors and insulators
Conduits, cables or conductors
Preformed panel circuit arrangement
C174S255000, C257S701000, C257S700000, C333S246000
Reexamination Certificate
active
06414250
ABSTRACT:
BACKGROUND OF INVENTION
The present invention relates to packaging assemblies for electrical circuits and, in particular, to multi-layered circuit assemblies that are hermetically sealed with a reflowed solder seal at the interface between each pair of overlapping layers.
A variety of methods exist for creating thin film circuits, such as transmission line type delay lines, oscillators, filters etc., using strip lines and micro-strip conductors. Many of these circuits are constructed as multi-layered structures from conductive materials that are deposited, patterned, etched and formed on suitable substrate materials, for example, ceramic or polymer sheets. Circuit terminations are provided that are compatible with the printed circuit mounting.
A primary necessity of the foregoing and many other types of multi-layer circuitry is that they must be mounted in environmentally insensitive packaging. Coatings of conventional encapsulants or outer covers are provided to protect the circuitry from the ambient environment. Most assemblies use polymer encapsulants that are conformally coated or molded to each layer and/or a cover assembly to protect the physical and electrical integrity of the circuitry. Covers may also be secured around all or a substantial portion of the assembled packages.
Problems can arise, however, if humidity is trapped inside or penetrates the packaging. For example, moisture can be trapped in the assembly. Moisture can also migrate into the assembly, if the encapsulant does not seal to the assembly or if pinholes are present in the encapsulant. Circuit reliability is thereby compromised due to possible open or short circuit conditions that can develop.
The encapsulant also adds undesired mass and bulk to the component packaging. Advantageous assemblies of reduced sizes can be constructed if the encapspulant can be avoided. Process complexity can then also be reduced with consequent savings in processing time and improved yields.
Depending upon the circuit assembly, package size is also affected by the necessary input and output circuit terminations that are distributed around the peripheral surfaces of the assembly. The number of terminations can add extra size, especially for products having J-shaped and gull wing-shaped terminations. Lead terminations also introduce possible impedance mismatch and unnecessary signal loss due to the extra length and complicated connections to the internal circuitry.
The present invention was developed to provide hermetically sealed circuit assemblies that don't require a conformal or molded encapsulant. Instead, hermetic seals are formed between the substrates of the laminated layers and at any cover pieces with a re-flowable material (e.g. metal alloy solders or other materials compatible with the substrate material and/or conductive paths). The internal layers and circuitry are connected with through vias that extend through the substrates. In one preferred surface mount package configuration, the conductors terminate at an array of spherical or ball shaped solder terminations known as a ball grid array (BGA) at the bottom surface of the assembly. Circuit integrity is thereby insured and package size is reduced with the present hermetically sealed, multi-layer assemblies.
SUMMARY OF INVENTION
It is a primary object of the invention to provide hermetically sealed multi layered circuit assemblies that do not require separate polymer encapsulation at the individual layers.
It is a further object of the invention to interconnect the layers and transmission line conductors with vias that extend through the substrates.
It is a further object of the invention to provide a hermetic seal using a re-flowable metal alloy solder (e.g. a Sn/Pb solder) that is thermally re-flowed and compressed under controlled conditions of time, temperature and pressure in the presence of suitable gas compositions.
It is a further object of the invention to seal the spaces between the layers of a multi-layer assembly with aligned endless paths of an appropriate material around the peripheries of two opposed layers (e.g. metal or metal alloy rings) and coating at least one of the endless paths with a sealant, such as a solder, and re-flowing the sealant to bond with the opposed path.
It is a further object of the invention that the seal be electrically conductive, for example, serving as a ground connector for the component.
The foregoing objects, advantages and distinctions of the invention are obtained in multi-layered thin film transmission line assemblies wherein at least one endless strip conductor is deposited around the periphery of one substrate at the interface between each pair of adjoining layers. A metal alloy solder compatible with the strip conductors and surface of the opposite substrate is introduced to flow between the adjoining layers to seal the interstitial space between the layers. The opposing layers can provide one or more endless conductive paths that overlap each other or an opposite ground plane or other endless, non-electrical structure compatible with the sealant.
REFERENCES:
patent: 5475465 (1995-12-01), Bhattacharyya et al.
patent: 5476719 (1995-12-01), Sandell et al.
patent: 5510758 (1996-04-01), Fujita et al.
patent: 6098282 (2000-08-01), Frankeny et al.
Brooks Mark
Howieson Michael
Inoue Hiroo
Thin Film Technology Corp.
Tschida DL
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