Active solid-state devices (e.g. – transistors – solid-state diode – Integrated circuit structure with electrically isolated... – Passive components in ics
Reexamination Certificate
2006-06-20
2006-06-20
Smith, Matthew (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Integrated circuit structure with electrically isolated...
Passive components in ics
C257S538000, C257S467000, C257S468000, C257S350000, C257S380000, C257S499000, C257S543000, C257S508000, C257S547000, C438S381000, C438S382000, C438S383000, C438S402000, C438S412000
Reexamination Certificate
active
07064414
ABSTRACT:
A structure and associated method for annealing a trapped charge from a semiconductor device. The semiconductor structure comprises a substrate and a first heating element. The substrate comprises a bulk layer, an insulator layer and a device layer. The first heating element is formed within the bulk layer. A first side of the first heating element is adjacent to a first portion of the insulator layer. The first heating element is adapted to be selectively activated to generate thermal energy to heat the first portion of the insulator layer and anneal a trapped electrical charge from the first portion of the insulator layer.
REFERENCES:
patent: 4091527 (1978-05-01), Goodman et al.
patent: 6111280 (2000-08-01), Gardner et al.
patent: 6171880 (2001-01-01), Gaitan et al.
patent: 6395587 (2002-05-01), Crowder et al.
patent: 6734076 (2004-05-01), Jaiswal et al.
patent: 2003/0027411 (2003-02-01), Kanai
patent: 2003/0119289 (2003-06-01), Bryant
patent: 2004/0000691 (2004-01-01), Wieczorek et al.
patent: 10163218 (1998-06-01), None
A New Integrated Test Structure for On-Chip Post-Irradiation Annealing in MOS Devices, by C. Chabrerie et al., appearing inNuclear Science, IEEE Transactions on, vol. 45, Issue 3, published Jun. 1998, In Cannes, France, one page.
Investigation of On-Chip High Temperature Annealing of PMOS Dosimeters, by A. Kellcher et al., appearing inNuclear Science, IEEE Transactions on, vol. 43, Issue 3, published Jun., 1996, in Arcaehon, France, one page.
Aitken John M
Cannon Ethan H.
Oldiges Philip J.
Strong Alvin W.
Canale Anthony
Parker John M.
Smith Matthew
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