Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2001-05-30
2004-10-12
Wojciechowicz, Edward (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S715000, C257S719000, C257S721000, C438S117000
Reexamination Certificate
active
06803652
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to apparatus for removing heat from electronic devices. In particular, the present invention relates to a heat sink having a load centering mechanism.
2. State of the Art
Higher performance, lower cost, increased miniaturization of integrated circuit components, and greater packaging density of integrated circuits are ongoing goals of the microelectronic and computer industry. As these goals are achieved, microelectronic dice become smaller. Accordingly, the density of power consumption of the integrated circuit components in the microelectronic die has increased, which, in turn, increases the average junction temperature of the microelectronic die. If the temperature of the microelectronic die becomes too high, the integrated circuits of the microelectronic die may be damaged or destroyed.
Various apparatus and techniques have been used and are presently being used for removing heat from microelectronic dice. One such heat dissipation technique involves the attachment of a heat dissipation device to a microelectronic die. One known embodiment, as shown in 
FIG. 3
a
, comprises a pin grid array-type (“PGA”) microelectronic die 
202
 placed in a socket 
204
 mounted on a carrier substrate 
206
, wherein pins 
208
 extending from the microelectronic die 
202
 make electrical contact with conductive vias 
212
 in the socket 
204
. The socket 
204
 is, in turn, in electrical contact (not shown) with the carrier substrate 
206
. The heat dissipation device 
220
 (shown as a finned heat sink having a plurality of fins 
222
) is kept in contact with the microelectronic die 
202
 with a spring clip 
224
 (see also 
FIG. 3
b
), which spans the heat dissipation device 
220
 and connects to the socket 
204
. Conductive grease or other such thermal interface 
226
 is placed between the microelectronic die 
202
 and the heat dissipation device 
220
. The disadvantage of this assembly is that the spring clip 
224
 distributes a disproportionate, lateral force or loading across the microelectronic die 
202
, which may cause cracking of the microelectronic die 
202
.
In order to prevent disproportionate loading, two load centering techniques have been developed. 
FIGS. 4
a 
and 
4
b 
illustrate one technique for load centering comprising a secondary clip 
240
 attached to or snapped on a spring clip 
234
. The force imposed on the heat dissipation device 
208
 by the spring wire 
234
 is directed through the secondary clip 
240
. Thus, the secondary clip 
240
 can be positioned at any desired location on the spring clip 
234
 to provide loading in that position. The disadvantage with using a secondary clip 
240
 for load centering is that it requires additional processing steps to correctly place the secondary clip 
240
.
FIG. 5
 illustrates a second technique for load centering comprising a spring clip 
242
 having an altered portion 
244
. The altered portion 
244
 may comprise a bend or a series of bends in the spring clip 
242
. Thus, when the spring clip 
242
 is attached, the force imposed on the heat dissipation device 
208
 by the spring clip 
242
 is directed through the altered portion 
244
. Thus, the altered portion 
244
 may be positioned at any desired location on the spring clip 
242
 to provide loading in that position. The disadvantage with using the spring clip 
242
 is that forming the altered portion 
244
 tends to reduce the retention force of the spring chip 
242
.
Therefore, it would be advantageous to develop a heat dissipation device having a load centering mechanism, which overcomes the disadvantages of known load centering mechanisms.
REFERENCES:
patent: 5386338 (1995-01-01), Jordan et al.
patent: 5428897 (1995-07-01), Jordan et al.
patent: 5615735 (1997-04-01), Yoshida et al.
patent: 5932925 (1999-08-01), McIntyre
patent: 6219241 (2001-04-01), Jones
patent: 6229703 (2001-05-01), Lee
patent: 2 281 149 (1995-02-01), None
patent: 2000 022370 (2000-01-01), None
Eckblad Michael Z.
Sopko Jeffrey J.
Winkel Casey R.
Intel Corporation
Winkle Rob G.
Wojciechowicz Edward
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