Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material
Reexamination Certificate
2002-01-18
2004-10-05
Coleman, W. David (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Housing or package
Insulating material
C257S717000
Reexamination Certificate
active
06800931
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a heat-dissipating device of a semiconductor device and to a method of manufacturing the semiconductor device, and more particularly to a heat-dissipating device of a semiconductor device, and method of fabricating the semiconductor device, in which the wiring substrate on which semiconductor chips are mounted is realized as a plurality of substrates, and further, which has a plurality of heat-dissipating structures.
2. Description of the Related Art
In conjunction with the advance in the number and variety of functions of semiconductor chips, which are assemblages of semiconductor elements (for example, LSI and IC), advances have been made in LSI packaging in which a plurality of substrates that secure semiconductor chips are electrically and mechanically joined to a wiring substrate. One issue that must be solved in such configurations, in which a wiring substrate and a group of LSI make up a single structure, is the occurrence of thermal stress that accompanies securing by mechanical joining.
The technique for solving this problem that is disclosed in Japanese Patent Laid-open No. 150735/2000 has received considerable attention. This known technique suppresses the occurrence of thermal stress by incorporating a heat-dissipating structure in a mechanically mounted structure that includes a first mounting body, in which semiconductor chips are mounted on a substrate, and a second mounting body in which the first mounting body is mounted on a wiring substrate. Although this known technique realizes the unified incorporation of a heat-dissipating structure in a two-layered mechanical structure, it apparently gives no information regarding the transmission characteristic of output signals that are outputted by chips.
A method is sought to suppress deterioration of the transmission characteristic of a multiple-structure package in which two types of substrates are joined and secured and which is provided with a heat-dissipating structure. A method is also sought to facilitate the assembly of this type of multiple-structure package.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a heat-dissipating device of a semiconductor device that can suppress deterioration of the transmission characteristic of a multiple-structure package in which two types of substrates are joined and secured and which is provided with a heat-dissipating structure. It is also an object of the present invention to provide a method of fabricating such a device.
A means of achieving this object is described hereinbelow. The technical items that appear in this description are assigned numbers or symbols in parentheses. These numbers or symbols coincide with the reference numbers or reference symbols that are assigned to the technical items that constitute at least one embodiment or a plurality of the working examples from among the plurality of embodiments or plurality of working examples of the present invention, and in particular, to the technical items that appear in the drawings that correspond to these embodiments or working examples. These reference numbers and reference symbols clarify the correspondence between and the technical items described in the claims and the technical items of the embodiments or working examples. However, this correspondence does not imply that the technical items described in the claims should be interpreted as being limited to the technical items of the embodiments or working examples.
A heat-dissipating device of a semiconductor device according to the present invention is constituted from:
a first wiring substrate (
1
) on which semiconductor elements (
7
) are mounted;
a second wiring substrate (
2
) that supports the back surface of the first wiring substrate
1
, i.e., the surface of the first wiring substrate (
1
) that is on the opposite side from a first substrate active surface (
4
), which is the surface on which the semiconductor elements (
7
) are mounted;
a heat dissipator (
9
) that is thermally and mechanically joined to the back surfaces of the semiconductor elements
7
, which are the surfaces of the semiconductor elements (
7
) that are on the opposite sides from the semiconductor element surfaces that confront the first substrate active surface (
4
); and
conductors (
6
) that extend, in the planar direction of the first substrate active surface (
4
) or a plane that approaches that of the first substrate active surface (
4
), from said first substrate active surface (
4
) as far as an electrical junction surface (
5
) of the second wiring substrate [
2
].
The conductors (
6
) extend in a straight line (linearly) that does not bend in the direction of the layers (an orthogonal direction that is orthogonal to the first substrate active surface
4
).
This definition means that the plane that contains the first substrate active surface (
4
) of the first wiring substrate (
1
) and the plane that contains the electrical junction surface (
5
) of the second wiring substrate
2
form the same plane, or that the plane that contains the first substrate active surface (
4
) of the first wiring substrate (
1
) and the plane that includes the electrical junction surface (
5
) of the second wiring substrate
2
are parallel and, moreover, are separated by a distance that approaches zero and is substantially zero. The length of the conductors (
6
) is therefore minimized, and the harmonic transmission characteristic is excellent.
In a heat-dissipating structure in which a heat dissipator (
9
), semiconductor elements (
7
), and the first wiring substrate (
1
) are stacked in this way, the conductors
6
, which are geometrically limited because the electrical junction point area of the second wiring substrate
2
cannot overlap with the heat-dissipating structure, extend in a planar direction due to the three-dimensional arrangement in which the distance of separation in an orthogonal direction, which is orthogonal to the planar direction, between the first substrate active surface (
4
) and the electrical junction surface (
5
) is substantially close to zero, whereby the length of the conductors is minimized. A distance of separation that is substantially close to zero can be achieved because the distance is less than the thickness of the first wiring substrate
1
.
The length of the conductors
6
does not include the distance between the edge of the first wiring substrate (
1
) and the edge of the second wiring substrate (
2
). As will be shown in
FIG. 2
described hereinbelow, this reduced length can be achieved because the two edges are in contact. The first wiring substrate (
1
) is set into the second wiring substrate
2
in the previously described orthogonal direction. This insetting allows the distance of separation between the first substrate active surface (
4
) and the electrical junction surface (
5
) to approach zero.
The heat dissipator (
9
) is preferably joined to the semiconductor elements with a heat conductive adhesive layer
8
interposed. A stacked heat dissipator (
12
), which is thermally and mechanically joined with an interposed heat conductive buffer layer (
11
) to the heat-dissipating surface of the heat dissipator (
9
) on the side of the heat dissipator (
9
) that is opposite the side on which the semiconductor elements (
7
) are arranged; and supports (
21
), which support the stacked heat dissipator (
12
) on the first wiring substrate (
1
), are also added. This stacked heat dissipator (
12
) has a more extensive heat-dissipating surface than the heat dissipator (
9
).
The stacked heat dissipator (
12
) is supported by the first wiring substrate (
1
) but is not supported by the first wiring substrate (
1
) via the heat dissipator (
9
) and the semiconductor elements (
7
), and the semiconductor elements (
7
) therefore do not receive the stress imposed by a massive stacked heat dissipator (
12
). The supports (
21
) may be formed by a portion of the heat dissipator (
9
). Another heat conductive adhesive layer
Coleman W. David
McGinn & GIbb, PLLC
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