Head retraction circuit

Dynamic magnetic information storage or retrieval – Automatic control of a recorder mechanism – Controlling the head

Reexamination Certificate

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Details

C360S078050, C360S078010

Reexamination Certificate

active

06466391

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates generally to a hard disk drive (HDD) system. More particularly, the invention relates to a head retraction circuit having a hold function that controls a head reading a disc so that the head is parked within a safety zone of the disc.
2. Description of Related Technology
FIG. 1
illustrates a plan view of a portion of the inside of a typical HDD system
15
that may, for example, be used as a non-volatile mass data storage device within a personal computer system (not shown). The HDD system
15
includes a disc
10
, which has a safety zone
11
and a data zone
12
, and a head
20
to read or write digital data on the disc
10
. When the HDD system
15
is unpowered (i.e., the system
15
is not in operation), the head
20
is preferably parked within the safety zone
11
of the disc
10
. As is known in the art, parking the head
20
within the safety zone
11
helps to prevent “crashes” or contacts of the head
20
on the data zone
12
of the disc
10
, thereby preventing the inadvertent loss of data due to mechanical damage of the data zone
12
of the disc
10
.
In operation, the HDD system
15
uses a spindle motor (not shown) to rotate the disc
10
at a predetermined speed and a voice coil motor (VCM) that moves the head
20
radially over the data zone
12
of the rotating disc
10
to read and/or write digital data thereon. Control of the spindle motor and the VCM is typically accomplished using a microprocessor or microcontroller (not shown) that executes a control program and which provides the appropriate control signals to the motors.
Initially, the HDD system
15
is unpowered, the disc
10
is not rotating, and the head
20
is preferably parked within the safety zone
11
of the disc
10
. When power is applied to the HDD system
15
, the microprocessor provides signals to the spindle motor so that the disc
10
is caused to rotate at a predetermined velocity. When the disc
10
reaches the predetermined velocity, the microprocessor provides signals to control the VCM so that the head
20
exits the safety zone
11
and moves radially over the data zone
12
to read and write digital data thereon. Conversely, when power is removed from the HDD system
15
, the microprocessor provides signals to the spindle motor to stop the motor and provides signals to the VCM so that the head
20
is retracted or parked within the safety zone
11
.
FIG. 2
illustrates a block diagram of a conventional a head retraction circuit
5
for the HDD system
15
that provides an automatic retraction or parking function for the head
20
. The head retraction circuit
5
includes a switching unit
1
, a reference voltage generator
2
, and first and second driver circuits
3
,
4
. The reference voltage generator
2
provides a substantially constant reference voltage to the switching unit
1
. The switching unit
1
, receives the reference voltage and control signals from the microprocessor (not shown) and provides control signals to the drivers
3
,
4
. The drivers
3
,
4
convert the control signals to provide current signals to the VCM winding that retract the head
20
to the safety zone
11
of the disc
10
.
FIG. 3
illustrates an exemplary detailed schematic diagram of the retraction circuit
5
shown in FIG.
2
. As shown, the reference voltage generator
2
includes a resistor R
2
and transistors Q
17
-Q
20
having their base-collector terminals connected to provide a diode function. The resistor R
2
and the transistors Q
17
-Q
20
are connected in series across a supply voltage VCC to provide a substantially constant reference voltage of about 2.8 volts (i.e., four diode drops) to the switching unit
1
.
The switching unit
1
, includes transistors Q
1
-Q
3
connected as shown. The base terminal of transistor Q
3
receives the reference voltage from the reference voltage generator
2
and transistor Q
1
receives an input signal (SWITCH) from the microprocessor. If the SWITCH input is high (i.e., the voltage on the base terminal of transistor Q
1
is sufficient to forward bias the base-emitter of Q
1
) then transistor Q
1
is ON and shunts across the collector-emitter of transistor Q
2
so that transistor Q
2
is OFF. As will be described in greater detail below, when transistor Q
2
is OFF, both drivers
3
,
4
are OFF so that no current is supplied to the VCM winding and the head
20
does not retract. Conversely, if the SWITCH input is low (i.e., about zero volts) then transistor Q
1
is OFF and transistor Q
3
uses the reference voltage at its base terminal to provide control signals via its emitter terminal to turn ON the drivers
3
,
4
to supply current to the VCM winding and retract the head
20
.
The first driver
3
includes transistors Q
4
-Q
10
and resistors R
3
and R
4
, all connected as shown. Those skilled in the art will recognize that transistors Q
5
and Q
6
are connected in a current mirror configuration so that the amount of current flowing through diode-connected transistor Q
5
is caused to flow through the collector terminal of transistor Q
6
. When transistor Q
6
conducts, a bias voltage is developed across resistor R
3
and transistors Q
7
and Q
8
. This bias voltage is coupled to the base terminal of transistor Q
9
to turn ON transistor Q
9
. Transistors Q
9
and Q
10
are connected in a Darlington configuration having a common emitter output (OUT
1
), which is connected to the VCM winding. Thus, when Q
9
is ON, Q
10
is also ON and may conduct a large amount of current while a very small current (i.e., Q
10
collector current divided by the product of the betas for Q
9
and Q
10
) is provided to the base terminal of transistor Q
9
.
The second driver
4
includes transistors Q
11
-Q
16
and resistors R
6
-R
8
, all connected as shown. Transistors Q
12
and Q
13
are connected in a current mirror configuration. Transistor Q
14
and resistor R
6
generate a bias voltage across the base-emitter junction of transistor Q
15
via the current provided by current mirror transistor Q
13
. Transistor Q
15
is connected to Q
14
and R
6
to amplify the current mirror current and to provide the amplified current to resistor R
7
and the base terminal of transistor Q
16
. The amplified current mirror current is available to drive transistor Q
16
to control the conduction through its collector terminal, which is connected to the VCM winding.
The switching unit
1
controls the ON/OFF condition of the drivers
3
,
4
in response to signals from the microprocessor. In particular, when the microprocessor applies a high level signal to the base terminal of transistor Ql then Q
1
is ON and shunts across the collector-emitter of transistor Q
2
, and Q
2
is OFF. When Q
2
is OFF, the current mirror transistors Q
5
and Q
12
of the drivers
3
,
4
are OFF and output drive transistors Q
10
, Q
16
are OFF so that no current is provided to the VCM to retract the head
20
. Alternatively, when the microprocessor applies a low level retraction signal to the base terminal of transistor Q
1
, then Q
1
is OFF and Q
2
is ON so that the current mirror transistors Q
5
and Q
12
are operational. With the current mirrors operational, the output drive transistors Q
10
, Q
16
of the drivers
3
,
4
are both ON so that current is provided to the VCM winding to retract the head
20
.
The above-described conventional head retraction circuitry is directly responsive to a retraction signal from the microprocessor and does not compensate for VCM momentum. As a result, because the motion of the head
20
at the time the switching unit
1
receives the retraction signal from the microprocessor is not determinate, the parked location of the head
20
can vary significantly. For example, if the VCM is moving the head
20
away from the safety zone
11
at the time the retraction signal is received by the switching unit
1
, the momentum of the VCM may prevent the head
20
from being retracted sufficiently to be parked within the safety zone
11
. Conversely, if the VCM is moving the head
20

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