Head or arbitrary bit pulse generating circuit and sampling puls

Cryptography – Key management – Having particular key generator

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Details

364717, 375 1, G06F 102

Patent

active

051289989

ABSTRACT:
A pseudo noise code generator is disclosed, in which the shift register value of the pseudo noise code generator corresponding to the generation timing of a bit pulse or a sampling pulse is latched and the output of the latch is compared with the shift register value of the generator, the bit pulse or the sampling pulse being obtained, when they are in accordance with each other.

REFERENCES:
patent: 4516217 (1985-05-01), Starner
patent: 4571546 (1986-02-01), Wilkinson
patent: 4845726 (1989-07-01), Kurihara et al.
patent: 4864525 (1989-09-01), Kurihara et al.
patent: 4943975 (1990-07-01), Kurihara et al.

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