Dynamic magnetic information storage or retrieval – Head – Magnetoresistive reproducing head
Reexamination Certificate
2000-09-25
2003-12-02
Klimowicz, William (Department: 2652)
Dynamic magnetic information storage or retrieval
Head
Magnetoresistive reproducing head
Reexamination Certificate
active
06657827
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to heads provided with a head chip, such as a magnetoresistive effect (MR) element or a magneto-optical read-write element, and more particularly relates to a head provided with an electrostatic noise-suppression circuit.
2. Description of the Related Art
Various types of heads have been used as a device for reading and writing a signal on a hard disk. For example, an MR head taking advantage of the magnetoresistive effect, a head taking advantage of magneto-optical writing and reading, and the like are known.
FIG. 9
is a perspective view showing one example of these conventional heads. A head
51
includes a head chip
52
having an MR element. The head chip
52
is provided in the proximity of a disk
53
(indicated by imaginary lines), the head reads signals recorded in the disk and writes signals to the disk.
Recently, the signal-reading speed of hard disks has increased. For example, a hard disk having a head
51
whose signal-reading speed is over 100 MB/s has been put into practical use. Furthermore, a hard disk having a signal-reading speed of 200 MB/s or more has appeared.
To deal with the hard disks having such a high signal-reading speed, an MR head chip has been used as the head chip
52
because of its superiority in the response speed.
In the head
51
, noise due to electrostatic charge is required to be removed. Conventionally, in order to remove this electrostatic noise, the head chip
52
is connected to a two-terminal varistor.
FIG. 10
illustrates a noise-suppression circuit using the conventional head
51
. As shown in
FIG. 10
, an electrostatic pulse generator
54
generates electrostatic noise and the two-terminal varistor
55
is provided ahead of the head chip
52
to remove the electrostatic noise. L
4
represents the inductance of the circuit of the head
51
, and L
1
represents a series-equivalent inductance of the two-terminal varistor
55
.
As the reading speed of the hard disk becomes faster, noise that is generated due to the discharge of electrostatic charges and that has a very short pulse width, whose duration is below a few nano-seconds, adversely-affects the head chip
52
, whereby characteristics of the head chip
52
tend to be deteriorated. This means that although the two-terminal varistor
55
is intended to serve to protect the head chip
52
from electrostatic noise, relatively high series-equivalent inductances L
1
and L
4
delay the operation of the varistor
55
, which leads to inadequate removal of the electrostatic noise.
SUMMARY OF THE INVENTION
Accordingly, it is an object of the present invention to provide a head which is capable of positively removing electrostatic noise and whose characteristics are hard to deteriorate when writing and reading, even when a high-speed head chip is used.
To this end, there is provided a head including a head chip, having first and second external connection electrodes, for reading a signal from a storage medium and writing a signal on the storage medium, a substrate having the head chip mounted thereon, a hot-side conductor path and a ground-side conductor path each formed on the surface of the substrate and electrically connected to the corresponding external connection electrodes of the head chip, and a chip varistor, mounted on the substrate, having first, second, and third terminal electrodes, the third terminal electrode being connected to the ground. In the head, the hot-side conductor path is divided, and the corresponding conductor parts of ends of the divided hot-side conductor paths are electrically connected to the first and the second terminal electrodes of the chip varistor, and the ground-side conductor path is electrically connected to the third terminal electrode of the chip varistor.
Since the head according to the present invention uses the three-terminal chip varistor having the first and the second terminal electrodes, and the third terminal electrode, which is grounded, the inductance of the head can be decreased by the equivalent-series inductance of the three-terminal chip varistor compared to a case in which a conventional two-terminal varistor is used. Accordingly, electrostatic noise can be effectively removed. Even in a case in which a high-speed head chip is used, since the electrostatic noise can be effectively removed, deterioration in characteristics of the head can be prevented during writing and reading.
Since the hot-side conductor path is divided and the corresponding conductor parts of ends of the divided hot-side conductor paths are electrically connected to the first and the second terminal electrodes, when electrostatic noise is input from the hot-side conductor path part which is not connected to the head chip, the electrostatic noise is output from the chip varistor to the third terminal electrode connected to the ground. Accordingly, the electrostatic noise can be removed via the ground-side conductor path. That is, the electrostatic noise can be prevented from being input to the hot-side conductor path part which is connected to the head chip. Therefore, deterioration in characteristics of the head due to electrostatic noise can be prevented.
The head may further include a fourth terminal electrode connected to the ground. In the head, the ground-side conductor path is divided, and the corresponding conductor parts of ends of the divided ground-side conductor paths are electrically connected to the third and fourth terminal electrodes.
Since the head according to the present invention uses the four-terminal chip varistor, in the same manner as in the three-terminal chip varistor, the inductance of the head can be decreased by the equivalent-series inductance of the four-terminal chip varistor, whereby electrostatic noise can be effectively removed. When electrostatic noise is input from the hot-side conductor path part which is not connected to the head chip, the electrostatic noise is output to the terminal electrode which is connected not to the head chip but to the ground-side conductor path part. Accordingly, the influence of electrostatic noise on the head chip can be prevented.
REFERENCES:
patent: 5351158 (1994-09-01), Shibata
patent: 5532656 (1996-07-01), Yoshimura
patent: 5792546 (1998-08-01), Kanamine et al.
patent: 5805390 (1998-09-01), Takeura
patent: 5812349 (1998-09-01), Shouji et al.
patent: 5978181 (1999-11-01), Niijima et al.
patent: 6031280 (2000-02-01), Sakoda
patent: 6060967 (2000-05-01), Asada
patent: 6233127 (2001-05-01), Shimazawa
patent: 6267903 (2001-07-01), Watanuki
patent: 6424505 (2002-07-01), Lam et al.
patent: 4-366409 (1992-12-01), None
patent: 8-045033 (1996-02-01), None
patent: 11-238212 (1999-08-01), None
patent: 11-265503 (1999-09-01), None
Fukuda Mitsumasa
Kojima Jun
Sakamoto Yukio
Keating & Bennett LLP
Klimowicz William
Murata Manufacturing Co. Ltd.
Nguyen Dzung C.
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