HDLC store and forward apparatus

Multiplex communications – Wide area network – Packet switching

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Details

371 53, H03M 1300, H04L 100

Patent

active

052609367

ABSTRACT:
A store and forward apparatus includes a deserializer for deserializing received frames of data into a sequence of n-bit words. Each frame includes a header, a data field and a frame checking sequence (FCS) generated by a first telecommunication node. The apparatus includes a storage for storing the deserialized n-bit words, and a processor for addressing the storage and for generating n-bit words corresponding to a new header of the received frame. The apparatus also includes a serializer receiving the n-bit words from the storage for generating a new frame having a new header field and a new FCS to be transmitted to a second telecommunication node. The apparatus further includes a receiver for receiving a frame and computes a first partial FCS covering the frame's data field only and a storage for storing the first partial FCS. During forwarding, n-bit words to be transmitted are simultaneously received by the serializer and by an apparatus for computing a second partial FCS covering the data field only. At the end of the serialization process, the two partial FCS results are compared to detect an error occurring during the computing of the new header of the frame. The result of the comparison is used as a control signal for altering the value of the FCS computed by serializer prior to transmission.

REFERENCES:
patent: 4723244 (1988-02-01), Iacoponi
patent: 4964127 (1990-10-01), Calvignac et al.
patent: 5046069 (1991-09-01), Calvignac et al.
patent: 5121396 (1992-06-01), Irvin et al.

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