HBT with emitter electrode having planar side walls

Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – Mesa or stacked emitter

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S317000, C438S320000, C438S364000, C257SE21371

Reexamination Certificate

active

07875523

ABSTRACT:
A heterojunction bipolar transistor is formed with an emitter electrode that comprises an emitter epitaxy underlying an emitter metal cap and that has horizontal dimensions that are substantially equal to the emitter metal cap.

REFERENCES:
patent: 4977435 (1990-12-01), Yoshimura
patent: 5206524 (1993-04-01), Chen et al.
patent: 5296733 (1994-03-01), Kusano et al.
patent: 5298439 (1994-03-01), Liu et al.
patent: 5371022 (1994-12-01), Hsieh et al.
patent: 5618754 (1997-04-01), Kasahara
patent: 5670801 (1997-09-01), Nakano
patent: 5804487 (1998-09-01), Lammert
patent: 5994194 (1999-11-01), Lammert
patent: 6271097 (2001-08-01), Morris
patent: 6458668 (2002-10-01), Yoon et al.
patent: 6462362 (2002-10-01), Miyoshi
patent: 6528378 (2003-03-01), Hirata
patent: 6765242 (2004-07-01), Chang et al.
patent: 6815304 (2004-11-01), Sankin et al.
patent: 6855613 (2005-02-01), Hamm et al.
patent: 6924201 (2005-08-01), Tanomura et al.
patent: 7001820 (2006-02-01), Miyajima et al.
patent: 7030462 (2006-04-01), Yagura et al.
patent: 2001/0011729 (2001-08-01), Singh et al.
patent: 2001/0042867 (2001-11-01), Furuhata
patent: 2002/0020851 (2002-02-01), Sakuma
patent: 2002/0066909 (2002-06-01), Tanomura
patent: 2002/0081531 (2002-06-01), Jain
patent: 2002/0142597 (2002-10-01), Park et al.
patent: 2002/0155670 (2002-10-01), Malik
patent: 2003/0077870 (2003-04-01), Yoon et al.
patent: 2003/0077898 (2003-04-01), Pullela
patent: 2003/0160302 (2003-08-01), Sankin et al.
patent: 2003/0203583 (2003-10-01), Malik
patent: 2004/0041235 (2004-03-01), Yanagihara et al.
patent: 2005/0035370 (2005-02-01), Chen
patent: 2005/0145884 (2005-07-01), Nogome
patent: 2006/0284282 (2006-12-01), Cunningham
Andre, P., et al., “InGaAs/InP DHBT Technology and Design Methodology for Over 40 Gb/s Optical Communication Circuits,”IEEE Journal of Solid-State Circuits, vol. 36, No. 9, pp. 1321-1327 (Sep. 2001).
Broekaert, T.P.E., et al., “InP-HBT Optoelectronic Integrated Circuits for Photonic Analog-to-Digital Conversion,”IEEE Journal of Solid-State Electronics, vol. 36, No. 9, pp. 1335-1342 (Sep. 2001).
Hafizi, M., et al., “Submicron Fully Self-Aligned AlInAs/GaInAs HBTs For Low-Power Applications,”Device Research Conference, pp. 80-81 (Jun. 19-21, 1995).
Jensen, J.F., et al., “AlInAs/GaInAs HBT IC Technology,”.IEEE Custom Integrated Circuits Conference, pp. .18.2.1-18.2.4 (1990).
Jensen, J.F., et al., “High Speed Dual Modulus Dividers Using AlInAs-GaInAs HBT • IC Technology,”GaAsIC Symposium, pp. 41-44 (Oct. 7-10, 1990).
Liu, W.,Handbook of III-V Heterojunction Bipolar Transistors, John Wiley & Sons, Inc., New York, New York, pp. 206-211 (1998).
Mokhtari, M., et al., “100+ GHz Static Divide-by-2 Circuit in InP-DHBT Technology,” IEEE Journal of Solid-State Circuits, vol. 38, No. 9, pp. 1540-1544 (Sep. 2003).
Sokolich, M., et al., “A Low-Power 72.8-GHz Static Frequency Divider in AlInAs/InGaAs HBT Technology,”IEEE Journal of Solid-State Circuits, vol. 36, No. 9, pp. 1328-1334 (Sep. 2001).
U.S. Appl. No. 10/966,219, filed Oct. 15, 2004, Fields.
U.S. Appl. No. 10/966,222, filed Oct. 15, 2004, Fields.
U.S. Appl. No. 11/156,078, filed Jun. 16, 2005, Fields.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

HBT with emitter electrode having planar side walls does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with HBT with emitter electrode having planar side walls, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and HBT with emitter electrode having planar side walls will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2736987

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.