Harmonic rejection mixer

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion

Reexamination Certificate

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C455S146000, C375S334000, C329S325000

Reexamination Certificate

active

07738851

ABSTRACT:
A technique includes providing a plurality of local oscillator signals such that each of the local oscillator signals has a different phase. The technique includes providing scaling units to scale the input signal pursuant to different scaling factors to generate scaled input signals. The scaling factors are selected on a periodic function of the phases. The technique also includes providing mixing circuits to mix the local oscillator signals with the scaled input signals to generate mixed signals and providing an adder to combine the mixed signals to generate an output signal.

REFERENCES:
patent: 5101509 (1992-03-01), Lai
patent: 6766158 (2004-07-01), Molnar et al.
patent: 2005/0123025 (2005-06-01), Sorrells et al.
patent: 2005/0221760 (2005-10-01), Tinsley et al.
patent: 2005/0270172 (2005-12-01), Bailey et al.
patent: 2006/0205370 (2006-09-01), Hayashi et al.
US Patent Office, International Search Report and Written Opinion for corresponding International Application No. PCT/US2007/020505, 7 pgs., Mar. 31, 2008.
Jeffrey A. Weldon et al., entitled “A 1.75-GHz Highly Integrated Narrow-Band CMOS Transmitter With Harmonic-Rejection Mixers,” IEEE Journal of Solid-State Circuits, vol. 36, No. 12, Dec. 2001, pp. 2003-2015.

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