Computer graphics processing and selective visual display system – Computer graphic processing system – Plural graphics processors
Reexamination Certificate
2001-11-08
2004-01-13
Tung, Kee (Department: 2676)
Computer graphics processing and selective visual display system
Computer graphic processing system
Plural graphics processors
C345S558000, C345S426000, C345S427000, C345S561000, C345S643000
Reexamination Certificate
active
06677953
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to computer graphics, and more particularly to a viewport operation in a computer graphics processing pipeline.
BACKGROUND OF THE INVENTION
Three dimensional graphics are central to many applications. For example, computer aided design (CAD) has spurred growth in many industries where computer terminals, cursors, CRT's and graphics terminals are replacing pencil and paper, and computer disks and tapes are replacing drawing vaults. Most, if not all, of these industries have a great need to manipulate and display three-dimensional objects. This has lead to widespread interest and research into methods of modeling, rendering, and displaying three-dimensional objects on a computer screen or other display device. The amount of computations needed to realistically render and display a three-dimensional graphical object, however, remains quite large and true realistic display of three-dimensional objects have largely been limited to high end systems. There is, however, an ever-increasing need for inexpensive systems that can quickly and realistically render and display three dimensional objects.
One industry that has seen a tremendous amount of growth in the last few years is the computer game industry. The current generation of computer games is moving to three-dimensional graphics in an ever increasing fashion. At the same time, the speed of play is being driven faster and faster. This combination has fueled a genuine need for the rapid rendering of three-dimensional graphics in relatively inexpensive systems. In addition to gaming, this need is also fueled by e-Commerce applications, which demand increased multimedia capabilities.
Rendering and displaying three-dimensional graphics typically involves many calculations and computations. For example, to render a three dimensional object, a set of coordinate points or vertices that define the object to be rendered must be formed. Vertices can be joined to form polygons that define the surface of the object to be rendered and displayed. Once the vertices that define an object are formed, the vertices must be transformed from an object or model frame of reference to a world frame of reference and finally to two-dimensional coordinates that can be displayed on a flat display device. Along the way, vertices may be rotated, scaled, eliminated or clipped because they fall outside the viewable area, lit by various lighting schemes, colorized, and so forth. Thus the process of rendering and displaying a three-dimensional object can be computationally intensive and may involve a large number of vertices.
One specific operation that is traditionally computation intensive is a viewport operation. The viewport operation specifies the affine transformation of x and y from normalized device coordinates to window coordinates. With (x
nd
, y
d
) being normalized device coordinates that are divided by a w-value, the window coordinates (x
w
, y
w
) are computed with the equations set forth in FIG.
1
. As shown, a viewport width and height are clamped to a range that depends on the implementation.
Such viewport transform operation is traditionally carried utilizing software due to the expensive nature of the operations—mainly expensive floating arithmetic like multiplication and division that are often not cost effective to be implemented in hardware. However, performing floating point operations in software is very slow. Thus, viewport transformation is a significant bottleneck in a graphics pipeline. With the growing demand for higher performance graphics for computers, the need for speeding up the viewport transform operations becomes imperative.
There is thus a general need to increase the speed of the various graphics processing components, while minimizing costs. In general, integration is often employed to increase the speed of a system. Integration refers to the incorporation of different processing modules on a single integrated circuit. With such processing modules communicating in a microscopic semiconductor environment, as opposed to external buses, speed is vastly increased.
Integration if often limited, however, by a cost of implementing and manufacturing multiple processing modules on a single chip. One reason for this increase in cost is that the required integrated circuit would be of a size that is too expensive to be feasible.
DISCLOSURE OF THE INVENTION
A system and method are provided for a dedicated hardware-implemented viewport operation in a graphics pipeline. Included is a transform/lighting module for transforming and lighting vertex data. Also provided is viewport hardware coupled to the transform/lighting module for performing a viewport operation on the vertex data. A rasterizer is coupled to the viewport hardware for rendering the vertex data.
In one embodiment, the viewport hardware includes a multiplier, an adder, a first and second scaler modules, a pair of first-in-first-out (FIFO) buffers, an inverse operation module, and a plurality of multiplexers for carrying out the viewport operation.
In another embodiment, the vertex data may be tagged in the viewport hardware. Further, the viewport operation may be carried out utilizing a plurality of parallel pipelines in the viewport hardware for acceleration purposes.
By this design, the tagging may be used to process the vertex data in the viewport hardware out of order, while outputting the vertex data in proper order. In particular, the vertex data may be processed in the viewport hardware based on a priority scheme.
As an option, the aforementioned parallel pipelines may include a first pipeline for processing a first set of vertex data including x-values, y-values, z-values, s-values, t-values, and q-values. The first set of vertex data may be buffered, transformed, and scaled utilizing the first pipeline in the viewport hardware.
Further, the parallel pipelines may include a second pipeline for processing a second set of vertex data including a-values, r-values, g-values, and b-values. The second set of vertex data may be buffered, unpacked, and scaled utilizing the second pipeline in the viewport hardware.
REFERENCES:
patent: 6141013 (2000-10-01), Nelson et al.
patent: 6304265 (2001-10-01), Harris et al.
patent: 6532009 (2003-03-01), Fox et al.
patent: 6567098 (2003-05-01), D'Amora
patent: 2001/0008400 (2001-07-01), Moriwaki et al.
patent: 2002/0063705 (2002-05-01), Moriwaki et al.
Tarolli Gary
Twardowski Kirk E.
NVIDIA Corporation
Silicon Valley IP Group PC
Tung Kee
Zilka Kevin J.
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