Hardware verification programming description generation...

Details Hardware verification programming description generation... Hardware verification programming description generation...

2011-08-02

2011-08-02

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Integrated circuit design processing

Logic design processing

C716S105000, C716S106000

Reexamination Certificate

active

07992112

ABSTRACT:
A hardware verification programming description generation apparatus includes: a behavior synthesis section, for a circuit of hardware that operates in accordance with a multi-phase clock, for dividing the hardware into blocks corresponding to clock systems and performing a behavior synthesis on each of the divided blocks, based on a behavioral description, the behavioral description only describing a process behavior of the hardware but does not describe information regarding a structure of the hardware; and a clock precision model generation section for generating clock precision models using the behavior-synthesized data, the clock precision model capable of verifying the hardware at a cycle precision level.

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