Hardware-software debugger using simulation speed enhancing tech

Details Hardware-software debugger using simulation speed enhancing tech Hardware-software debugger using simulation speed enhancing tech

1994-10-25

1997-10-14

Louis-Jacques, Jacques

Boots, shoes, and leggings

364578, 39518304, 39518309, 371 225, G06F 9455, G01R 3128

Patent

active

056780281

ABSTRACT:
The speed of a hardware-software debugger is markedly increased through the use of high speed simulators which ignore all systems operations except those where design errors are expected to manifest themselves, by skipping CPU bus cycles of no interest for the simulation, by not explicitly simulating periodic clock signals and generating only schedules of clock signals, and by caching instructions when alien computers are used in the simulation process to eliminate decoding of the instructions of the target computer.

REFERENCES:
patent: 5313618 (1994-05-01), Pawloski
patent: 5327361 (1994-07-01), Long et al.
patent: 5329471 (1994-07-01), Swoboda et al.
patent: 5357628 (1994-10-01), Yuen
patent: 5388060 (1995-02-01), Adams, Jr. et al.
patent: 5438673 (1995-08-01), Court et al.
patent: 5440697 (1995-08-01), Boegel et al.

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