Hardware-software co-simulation system, hardware-software co-sim

Details Hardware-software co-simulation system, hardware-software co-sim Hardware-software co-simulation system, hardware-software co-sim

1997-12-23

1999-09-28

Teska, Kevin J.

Boots, shoes, and leggings

364578, 364488, 364489, 364490, G06F 1900

Patent

active

059601825

ABSTRACT:
A hardware verification module performs simulation for hardware verification with input from an RT-level processor model and an RT-level hardware description. All abstraction module abstracts from the RT-level hardware description on a processor input/output instruction operation level to generate an abstracted description describing an instruction-level hardware description. A software verification module performs simulation for software verification with input from an instruction-level processor model and the abstracted description.

REFERENCES:
patent: 5493672 (1996-02-01), Lau et al.
patent: 5784593 (1998-07-01), Tseng et al.
patent: 5801958 (1998-09-01), Dangelo et al.
patent: 5809283 (1998-09-01), Vaidyanathan et al.

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