Boots – shoes – and leggings
Patent
1980-02-21
1983-06-14
Shaw, Gareth D.
Boots, shoes, and leggings
G06F 1100
Patent
active
043886957
ABSTRACT:
A hardware circuit for protecting against the accidental writing in an area of memory which contains critical data. In order to access the critical data memory area during a write cycle, it is necessary first to control predetermined memory access cycles which include, for example, the writing of predetermined data at a predetermined address. After detection of such a "fictitious" write cycle, the hardware allows the next write cycle to access the critical data memory area.
REFERENCES:
patent: 3827029 (1974-07-01), Schlotterer
patent: 4093986 (1978-06-01), Bodner
Mills John G.
Shaw Gareth D.
Timeplex, Inc.
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