Boots – shoes – and leggings
Patent
1988-04-26
1990-11-06
Zache, Raulfe B.
Boots, shoes, and leggings
3642281, 3642283, 364243, 3642431, G06F 1516
Patent
active
049690884
ABSTRACT:
An interconnection network management architecture for use with a large shared memory multiprocessor computing system including a plurality of processors and a plurality of separately addressable main memory modules. Two parallel, interconnection networks are provided each capable of interconnecting any processor to any memory module, and each having different latency characteristics. A Hot-Spot detection mechnaism is associated with each main memory module for detecting when a particular address in that module has become a Hot Spot and includes a first memory for storing all detected Hot Spots. A diverter element is associated with each processor for selectively routing memory requests over either the first or second memory network contingent on its status as a Hot Spot. A second memory is included in each diverter element for storing all Hot Spots detected by the detector elements. A control mechanism determines if any current main memory address is a listed Hot Spot within the second memory and, if so, causes the main memory reference to be transmitted to the memory system over a selected interconnection network. Another component of this mechanism determines if a particular address has been accessed a sufficient number of times within a given timeframe to be deemed a Hot Spot and removes Hot Spots from both the first and second memories when necessary.
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McAuliffe Kevin P.
Norton Vern A.
Pfister Gregory F.
Rathi Bharat D.
International Business Machines - Corporation
Schlemmer Roy R.
Zache Raulfe B.
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