Hardware logic simulator

Details Hardware logic simulator Hardware logic simulator

1988-02-24

1990-05-08

Gruber, Felix D.

Boots, shoes, and leggings

364200, 3642212, 364900, 3649163, 371 23, G06F 944, G06F 1200, G01R 3128

Patent

active

049244299

ABSTRACT:
A hardware logic simulator includes a first memory, having memory locations respectively corresponding to a plurality of signals in a logic circuit to be simulated, for storing data representing states of the plurality of signals, and a second memory having memory locations respectively corresponding to those of the first memory and an address bus common therewith. When the content of a memory location at a given address of the first memory is changed during simulation, data representing the change in state of the corresponding signal is written in a second memory location corresponding to the given address. The content of the second memory is read out at the end of the simulation and the degree of completeness of the simulation is evaluated.

REFERENCES:
patent: 4697241 (1987-09-01), Lavi
patent: 4725970 (1988-02-01), Burrows et al.
patent: 4736338 (1988-04-01), Saxe et al.
patent: 4782440 (1988-11-01), Nomizu et al.
patent: 4787061 (1988-11-01), Nei et al.
Takasaki et al., "HAL II: A Mixed Level Hardware Simulation System," 1986, IEEE 23rd Design Automation Conference, pp. 581-587.

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