Hardware implemented divider for binary numbers using a redundan

Details Hardware implemented divider for binary numbers using a redundan Hardware implemented divider for binary numbers using a redundan

1997-03-20

1999-05-25

Moise, Emmanuel L.

Boots, shoes, and leggings

G06F 752

Patent

active

059074990

ABSTRACT:
A divider including a quotient decision circuit for making a sign decision of a quotient bit from upper three bits of a partial remainder, a redundant binary adder for adding a divisor to the partial remainder, a redundant binary subtractor for subtracting the divisor from the partial remainder, and a selector for selecting one of the output of the redundant binary adder, the partial remainder, and the output of the redundant binary subtractor. All these circuits use redundant binary numbers in which a set of values (-1, 0, 1) taken by each digit of the redundant binary number is represented by (01, 00, 10). This makes it possible to solve a problem of conventional dividers in that the conversion of a redundant binary number was necessary before the quotient decision because the partial remainder computing section and the quotient decision section of the conventional dividers employed redundant binary numbers whose bit arrangements differ from each other, which hinders the conventional dividers from achieving fast division.

REFERENCES:
patent: 5206827 (1993-04-01), Tsuruta
patent: 5473559 (1995-12-01), Makino
N. Takagi et al., "A VLSI-Oriented High-Speed Divider Using Redundant Binary Representation," The Journal D of the Institute of Electronics, Information and Communication Engineers of Japan, 84/4, vol. J67-D, No. 4, pp. 450-457.
T. Taniguchi et al., "High-Speed Multiplier and Divider Using Redundant Binary Representation," Technical Report ED88-48 of the Institute of Electronics, Information and Communication Engineers of Japan, pp. 1-6.

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