Boots – shoes – and leggings
Patent
1992-07-17
1994-03-01
Dixon, Joseph L.
Boots, shoes, and leggings
395425, 395375, 364DIG1, 3642543, G06P 1314, G06P 1328
Patent
active
052915867
ABSTRACT:
Apparatus for improving the efficiency of computer instructions which transfer data from memory to machine registers and from machine registers to memory. The difficulty arises because such instructions may require data transfers of a variable number of bytes, may involve transfer across word boundaries within memory, and may use a number of machine registers. These features are important to programs which process variable amounts of data at different storage locations. Such transfer operations are performed by "mini-instructions", which are a proper subset of instructions that already exist within the current repertoire. However, the "mini-instructions" used are limited in the use of variables to only those which make most effective use of the hardware architecture. One or more "mini-instructions" must be used to execute the actual software instruction. Because the mini-instructions needed are a proper subset of the actual software instruction, little additional hardware is required. The result is a control structure which executes a given actual software instruction a number of times, but with variables which change to accomplish complex data transfers without resort to microcode or other lower level hardware languages.
REFERENCES:
patent: 3886523 (1975-05-01), Ferguson et al.
patent: 4080648 (1978-03-01), Asano et al.
patent: 4168523 (1979-09-01), Chari et al.
patent: 4199811 (1980-04-01), Borgerson et al.
patent: 4298927 (1981-11-01), Berglund et al.
patent: 4307445 (1981-12-01), Tredennick et al.
patent: 4315308 (1982-02-01), Jackson
patent: 4319324 (1982-03-01), Johnson et al.
patent: 4325120 (1982-04-01), Colley et al.
patent: 4361869 (1982-11-01), Johnson et al.
patent: 4367524 (1983-01-01), Budde et al.
patent: 4370712 (1983-01-01), Johnson et al.
patent: 4384324 (1983-05-01), Kim et al.
patent: 4415969 (1983-11-01), Bayliss et al.
patent: 4438493 (1984-03-01), Cushing et al.
patent: 4472772 (1984-09-01), Flora
patent: 4491908 (1985-01-01), Woods et al.
patent: 4493020 (1985-01-01), Kim et al.
patent: 4539087 (1986-05-01), Auslander et al.
patent: 4716545 (1987-12-01), Whipple et al.
patent: 4745547 (1988-05-01), Buchholz et al.
patent: 4825355 (1989-04-01), Kurakazu et al.
patent: 4839797 (1989-06-01), Katori et al.
patent: 4862351 (1989-08-01), Green et al.
patent: 4876639 (1989-10-01), Mensch, Jr.
patent: 4947316 (1990-08-01), Fisk et al.
patent: 4992934 (1991-02-01), Portanova et al.
patent: 5136696 (1992-08-01), Beckwith et al.
IBM Technical Disclosure Bulletin, vol. 19, No. 1, Jun. 1976, "Data Length Calculation Hardware".
IBM Technical Disclosure Bulletin, vol. 25, No. 4, Sep. 1982, "Efficient Handling of Load Multiple Instruction".
Gage Patricia A.
Jen Amy K.
Ngai Agnes Y.
Dixon Joseph L.
Donaghue L.
International Business Machines - Corporation
Jaeger Hugh D.
Samodovitz Arthur J.
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