Hardware extraction technique for programmable reduced instructi

Details Hardware extraction technique for programmable reduced instructi Hardware extraction technique for programmable reduced instructi

1995-11-08

1998-10-06

Trans, Vincent N.

Boots, shoes, and leggings

395376, 395705, 36423223, 3642604, 364261, 3642804, 364DIG1, G06F 945

Patent

active

058190643

ABSTRACT:
A new class of purpose computers called Programmable Reduced Instruction Set Computers (PRISC) use RISC techniques a basis for operation. In addition to the conventional RISC instructions, PRISC computers provide hardware programmable resources which can be configured optimally for a given user application. A given user application is compiled using a PRISC compiler which recognizes and evaluates complex instructions into a Boolean expression which is assigned an identifier and stored in conventional memory. The recognition of instructions which may be programmed in hardware is achieved through a combination of bit width analysis and instruction optimization. During execution of the user application on the PRISC computer, the stored expressions are loaded as needed into a programmable functional unit. Once loaded, the expressions are executed during a single instruction cycle.

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M.D. Smith, "Tracing with pixie", Technical Report CSL-TR-91-497, Stanford University, Nov. 1991, pp. 1-29.

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