Hardware-efficient transceiver with delta-sigma...

Telecommunications – Receiver or analog modulated signal frequency converter – Frequency modifying or conversion

Reexamination Certificate

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Details

C455S110000, C455S131000

Reexamination Certificate

active

06321075

ABSTRACT:

BACKGROUND OF THE INVENTION
I. Field of the Invention
This invention relates to communications systems. Specifically, the present invention relates to transceivers used in communications networks.
II. Description of the Related Art
Cellular telecommunications systems are characterized by a plurality of mobile transceivers in communication with one or more base stations. Each transceiver includes a transmitter and a receiver.
In a typical transceiver, an analog radio frequency (RF) input signal, received by an antenna, is downconverted by an RF section to an intermediate frequency (IF). Signal processing circuits perform noise filtering and adjust the magnitude of the signal via analog automatic gain control (AGC) circuitry. An IF section then mixes the signal down to baseband and converts the analog signal to a digital signal. The digital signal is then input to a baseband processor for further signal processing to output voice or data.
Similarly, the transmitter receives a digital input from the baseband processor and converts the input to an analog signal. This signal is then filtered and upconverted by an IF stage to an intermediate frequency. The gain of the transmit signal is adjusted and the IF signal is upconverted to RF in preparation for radio transmission.
In both the transmit and receive sections, signal gain adjustment and mixing is typically performed in the analog domain. This necessitates the use of a plurality of local oscillators (LOs) for signal downconversion, upconversion, and mixing. Analog local oscillators tend to be bulky and require the use of one or more phase-locked loops. As is well known in the art, phaselocked loops are large, expensive circuits that consume a considerable amount of power. Hence the use of PLLs, drive up the cost, size and power consumption of analog local oscillators and the transceivers in which these circuits are employed.
Hence, a need exists in the art for a cost-effective, space-efficient transceiver with low noise characteristics and minimal power consumption.
SUMMARY OF THE INVENTION
The need in the art is addressed by the transceiver of the present invention. The inventive transceiver includes a digital circuit for converting baseband signals to intermediate frequency signals. A signal source provides a first periodic signal of a first frequency. A direct digital synthesizer provides a second periodic signal of a second frequency from the first periodic reference signal. An upconverter circuit digitally upconverts the baseband signals to digital intermediate frequency signals using the second periodic signal. A digital-to-analog converter converts the digital intermediate frequency signals to analog intermediate frequency signals using the first periodic signal.
In the transceiver implementation, the digital circuit upconverts a first transmit signal from a first frequency to a second frequency in response to the second periodic signal and provides a digital transmit signal in response thereto. A second circuit is provided for converting the digital transmit signal to an analog transmit signal. Transmit and receive circuitry are provided for transmitting the analog transmit signal and receiving an analog receive signal, respectively.
In a specific embodiment, the analog receive signal is digitally downconverted to provide a digital receive signal in response to a second periodic signal. A significant feature of the invention resides in the provision of the first and second periodic signals with a single local oscillator. A direct digital synthesizer is included for generating one of the reference signals from the output of the local oscillator.
The transmit circuit includes a delta-sigma digital-to-analog converter having the first periodic signal as an input. The delta-sigma digital-to-analog converter has a low-bit digital-to-analog converter and a delta-sigma modulator.
In the illustrative embodiment, the low-bit digital-to-analog converter is a 1-bit digital-to-analog converter and the delta-sigma modulator is a sixth order delta-sigma modulator. The delta-sigma modulator includes amplifiers with approximately the following gains: 3/2, −3/4, 1/8.
The transmit circuit includes a digital automatic gain control circuit for adjusting the gain of the first signal. An output of the automatic gain control circuit is input to the delta-sigma digital-to-analog converter. Also, a digital lowpass filter, a digital mixer, and a digital adder are included in the transmit circuit An output of the digital adder provides an input to the automatic gain control circuit.
The novel design of the present invention is facilitated by the elimination of a local oscillator via the use of the direct digital synthesizer and the delta-sigma digital-to-analog converter. By eliminating a local oscillator, power and space savings are achieved.


REFERENCES:
patent: 4560906 (1985-12-01), Kerekes
patent: 5003621 (1991-03-01), Gailus
patent: 5058107 (1991-10-01), Stone et al.
patent: 5375146 (1994-12-01), Chalmers
patent: 5493721 (1996-02-01), Reis
patent: 5627499 (1997-05-01), Gardner
patent: 5796777 (1998-08-01), Terlep et al.
patent: 5898325 (1999-04-01), Crook et al.
patent: 5930301 (1999-07-01), Chester et al.
patent: 5999802 (1999-10-01), Aschwanden
patent: 0535800 (1993-04-01), None
patent: 0595781 (1994-05-01), None

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