Hardware-efficient phase-to-amplitude mapping design for...

Details Hardware-efficient phase-to-amplitude mapping design for... Hardware-efficient phase-to-amplitude mapping design for...

2006-01-25

2009-08-25

Mai, Tan V (Department: 2193)

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

C327S105000

Reexamination Certificate

active

07580964

ABSTRACT:
A hardware-efficient mapping circuit uses a base decoder to decode the control signal (the most significant bits “MSBs” of the phase angle) to provide a base value. A controller maps the control signal to a segment number to down select signed shift values from the control signal. Shifter blocks shift the data signal (the least significant bits “LSBs” of the phase angle) by the respective shift values. The shifted data signals are added/subtracted from the base value to approximate a sinusoidal amplitude for the phase angle. Down selection by a controller allows the shifter blocks to be implemented with narrow band multiplexers, which conserves both chip space and power.

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A. Edman et al., Symposium on VLSI Circuits Digest of Technical Papers, pp. 54-55, Jun. 1998.

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