Hardware-based accelerator for time-domain scientific computing

Electrical computers: arithmetic processing and calculating – Electrical digital calculating computer – Particular function performed

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

10295642

ABSTRACT:
The present invention is directed to an apparatus and methods that facilitate implementation of a practical Finite-Difference-Time-Domain (FDTD) hardware accelerator. The apparatus and methods of the present invention increase speed, reduce memory requirements, and/or simplify a FDTD hardware implementation. This is accomplished by providing one, some, or all of the following: a reformulated FDTD method to simplify the hardware implementation; a memory look-up table (MLUT) to decrease memory requirements; customized, floating-point arithmetic units optimized for speed to decrease execution time; a memory switching unit (MSU) that coordinates multiple memory reads and writes from/to multiple random access memories (RAMs) to simplify control; a data dependence unit (DDU) that determines all dependencies associated with a given calculation to simplify control; and/or a control unit based on a global counter to simplify control.

REFERENCES:
Shi et al, “Electromagnetic analysis of axially symmetric diffractive optical elements illuminated by oblique incedent plane waves”, vol. 18, No. 11/Nov. 2001/ J. Optical Society of America, pp. 2901-2907.
Shi et al, “Numerical Study of Axisymmetric Dielectric Resonators”, 2001 IEEE, pp. 1614-1619.
Weedon et al, “Modeling and stability considerations for FDTD analys of wave propagation in lossy dispersive soils”, SPIE vol. 2747, pp. 245-251.
Juntunen et al, “Reduction of Numerical Dispersion in FDTD Method Through Artificial Anisotropy”, 200 IEEE, pp. 582-588.
Luneau et al, “Polarimetric responses of underground targets using an hybrid transfer function FDTD method”, 1997 IEEE, pp. 826-829.
Marrocco et al, “Time-Domain Maromodel of Planar Microwave Devices by FDTD and Moment Expansion”, 2001 IEEE, pp. 1321-1328.
J.R. Marek,Investigation of a Design for a Finite-Difference Time Domain(FDTD)Hardware Accelerator, Air Force Inst. of Tech., Wright-Patterson, AFB, M.S. Thesis (1991).
J.R. Marek et al.,A Dedicated VLSI Architecture for Finite-Difference Time Domain Calculations, presented at The 8th Annual Review of Progress in Applied Computational Electromagnetics, Naval Postgraduate School (Monterey, California, 1992).
R.N. Schneider et al.,Application of FPGA Technology to Accelerate the Finite-Differnce Time-Domain(FDTD)Method, presented at The 10th ACM Int'l Symposium on Field-Programmable Gate Arrays, (Monterey, California 2002).
J.P. Berenger,A Perfectly Matched Layer for the Absorption of Electromagnetic Waves, J. of Computational Physics, vol. 114, pp. 94-103 (1994).
K.S. Yee,Numerical Solution of Initial Boundary Value Problems Involving Maxwell's Equations in Isotropic Media, IEEE Transactions on Antennas and Propagation, vol. 14, pp. 302-307 (1966).
P. Placidi et al.,A Custom VLSI Archecture for the Solution of FDTD Equations, IEICE Trans. Electron., vol. E85-C, No. 3, pp. 572-577 (Mar. 2002).

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Hardware-based accelerator for time-domain scientific computing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Hardware-based accelerator for time-domain scientific computing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Hardware-based accelerator for time-domain scientific computing will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-3778803

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.