Hard or soft cell failure differentiator

Excavating

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G06F 1108, G11C 2900

Patent

active

042558085

ABSTRACT:
A method of and an apparatus for differentiating between hard and soft failures of semiconductor memory cells for the purpose of error logging only hard failures. A spare bit position is appended to each addressable location within the semiconductor memory. The spare bit position is set, if the corresponding addressable location is observed to contain a single bit error during regeneration. The spare bit position is cleared, if the corresponding addressable location is observed not to contain a single bit error during regeneration. An error log entry is made for normal read access to an addressable location observed to contain a single bit error only if the spare bit is set indicating that a single bit error was present during regeneration of that addressable location.

REFERENCES:
patent: 3906200 (1975-09-01), Petschauer
patent: 3917933 (1975-11-01), Scheuneman
patent: 3999051 (1976-12-01), Petschauer
patent: 4045779 (1977-08-01), Markle
patent: 4112502 (1978-09-01), Scheuneman

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