Hand-held computers incorporating reduced area imaging devices

Details Hand-held computers incorporating reduced area imaging devices Hand-held computers incorporating reduced area imaging devices

2000-08-15

2002-07-23

Rao, Andy (Department: 2613)

Television

Special applications

With endoscope

C348S376000, C455S566000, C455S556200

Reexamination Certificate

active

06424369

ABSTRACT:

TECHNICAL FIELD
This invention relates to solid state image sensors and associated electronics, and more particularly, to solid state image sensors which are configured to be of a minimum size and used within miniature computer systems known as palm top computers, personal digital assistants (PDA), or hand-held computers/organizers.
BACKGROUND ART
The three most common solid state image sensors include charged coupled devices (CCD), charge injection devices (CID) and photo diode arrays. In the mid-1980s, complementary metal oxide semiconductors (CMOS) were developed for industrial use. CMOS imaging devices offer improved functionality and simplified system interfacing. Furthermore, many CMOS imagers can be manufactured at a fraction of the cost of other solid state imaging technologies.
The CCD device is still the preferred type of imager used in scientific applications. Only recently have CMOS-type devices been improved such that the quality of imaging compares to that of CCD devices. However, there are enormous drawbacks with CCD devices. Two major drawbacks are that CCD device have immense power requirements, and the amount of processing circuitry required for a CCD imager always requires the use of a remote processing circuitry module which can process the image signal produced by the CCD imager. Also, because of the type of chip architecture used with CCD devices, on-chip processing is impossible. Therefore, even timing and control circuitry must be remoted from the CCD imager plane. Therefore, CCD technology is the antithesis of “camera on a chip” technology discussed below.
One particular advance in CMOS technology has been in the active pixel-type CMOS imagers which consist of randomly accessible pixels with an amplifier at each pixel site. One advantage of active pixel-type imagers is that the amplifier placement results in lower noise levels. Another major advantage is that these CMOS imagers can be mass produced on standard semiconductor production lines. One particularly notable advance in the area of CMOS imagers including active pixel-type arrays is the CMOS imager described in U.S. Pat. No. 5,471,515 to Fossum, et al. This CMOS imager can incorporate a number of other different electronic controls that are usually found on multiple circuit boards of much larger size. For example, timing circuits, and special functions such as zoom and anti-jitter controls can be placed on the same circuit board containing the CMOS pixel array without significantly increasing the overall size of the host circuit board. Furthermore, this particular CMOS imager requires 100 times less power than a CCD-type imager. In short, the CMOS imager disclosed in Fossum, et al. has enabled the development of a “camera on a chip.”
Passive pixel-type CMOS imagers have also been improved so that they too can be used in an imaging device which qualifies as a “camera on a chip.” In short, the major difference between passive and active CMOS pixel arrays is that a passive pixel-type imager does not perform signal amplification at each pixel site. One example of a manufacturer which has developed a passive pixel array with performance nearly equal to known active pixel devices and compatible with the read out circuitry disclosed in the U.S. Pat. No. 5,471,515 is VLSI Vision, Ltd., 1190 Saratoga Avenue, Suite 180, San Jose, Calif. 95129. A further description of this passive pixel device may be found in co-pending application, Ser. No. 08/976,976, entitled “Reduced Area Imaging Devices Incorporated Within Surgical Instruments,” now U.S. Pat. No. 5,986,693, and is hereby incorporated by reference.
In addition to the active pixel-type CMOS imager which is disclosed in U.S. Pat. No. 5,471,515, there have been developments in the industry for other solid state imagers which have resulted in the ability to have a “camera on a chip.” For example, Suni Microsystems, Inc. of Mountain View, Calif., has developed a CCD/CMOS hybrid which combines the high quality image processing of CCDs with standard CMOS circuitry construction. In short, Suni Microsystems, Inc. has modified the standard CMOS and CCD manufacturing processes to create a hybrid process providing CCD components with their own substrate which is separate from the P well and N well substrates used by the CMOS components. Accordingly, the CCD and CMOS components of the hybrid may reside on different regions of the same chip or wafer. Additionally, this hybrid is able to run on a low power source (5 volts) which is normally not possible on standard CCD imagers which require 10 to 30 volt power supplies. A brief explanation of this CCD/CMOS hybrid can be found in the article entitled “Startup Suni Bets on Integrated Process” found in
Electronic News,
Jan. 20, 1997 issue. This reference is hereby incorporated by reference for purposes of explaining this particular type of imaging processor.
Another example of a recent development in solid state imaging is the development of a CMOS imaging sensor which is able to achieve analog to digital conversion on each of the pixels within the pixel array. This type of improved CMOS imager includes transistors at every pixel to provide digital instead of analog output that enable the delivery of decoders and sense amplifiers much like standard memory chips. With this new technology, it may, therefore, be possible to manufacture a true digital “camera on a chip.” This CMOS imager has been developed by a Stanford University joint project and is headed by Professor Abbas el-Gamal.
A second approach to creating a CMOS-based digital imaging device includes the use of an over-sample converter at each pixel with a one bit comparator placed at the edge of the pixel array instead of performing all of the analog to digital functions on the pixel. This new design technology has been called MOSAD (multiplexed over sample analog to digital) conversion. The result of this new process is low power usage, along with the capability to achieve enhanced dynamic range, possibly up to 20 bits. This process has been developed by Amain Electronics of Simi Valley, Calif. A brief description of both of the processes developed by Stanford University and Amain Electronics can be found in an article entitled “A/D Conversion Revolution for CMOS Sensor?,” September 1998 issue of
Advanced Imaging.
This article is also hereby incorporated by reference for purposes of explaining these particular types of imaging processors.
Yet another example of a recent development with respect to solid state imaging is an imaging device developed by ShellCase, of Jerusalem, Israel. In an article entitled “A CSP Optoelectronic Package for Imaging and Light Detection Applications” (A. Badihi), ShellCase introduces a diesized, ultrathin optoelectronic package which is completely packaged at the wafer level using semiconductor processing. In short, ShellCase provides a chip scale package (CSP) process for accepting digital image sensors which may be used, for example, in miniature cameras. The die-sized, ultrathin package is produced through a wafer level process which utilizes optically clear materials and completely encases the imager die. This packaging method, ideally suited for optoelectronic devices, results in superior optical performance and form factor not available by traditional image sensors. This article is also incorporated by reference for purposes of explaining ShellCase's chip scale package process.
Yet another example of a recent development with respect to solid state imaging is shown in U.S. Pat. No. 6,020,581 entitled “Solid State CMOS Imager Using Silicon on Insulator or Bulk Silicon.” This patent discloses an image sensor incorporating a plurality of detector cells arranged in an array wherein each detector cell as a MOSFET with a floating body and operable as a lateral bipolar transistor to amplify charge collected by the floating body. This invention overcomes problems of insufficient charge being collected in detector cells formed on silicon on insulator (SOI) substrates due to silicon thickness and will also work in bulk s

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