1994-09-30
1997-05-13
Downs, Robert W.
G06K 900
Patent
active
056300212
ABSTRACT:
A Hamming neural network circuit is provided with N binary inputs and M exemplar template outputs, and has a template matching calculation subnet and a winner-take-all subnet. The template matching calculation subnet includes M first neurons in which M exemplar templates are stored respectively. Each first neuron includes N pull-up and pull-down transistor pairs connected in parallel with each other, and connected to and controlled by the N binary inputs, respectively, so that the M first neurons generate M template matching signals depending on the matching degrees between the N binary inputs and the M exemplar templates. The winner-take-all subnet includes M second neurons, each having a template competition node, a load element connected between a power source and the template competition node, and a competition circuit connected between the template competition node and ground. The M template competition nodes are connected to the M template matching signals respectively for generating the M exemplar template outputs. The competition circuit of each second neuron includes M -1 parallel-connected transistors controlled respectively by the template competition nodes of all second neurons except the template competition node of itself so that the template competition node connecting with the largest template matching signal is eventually at a relatively high voltage level, and the other template competition nodes are at a relatively low voltage level, after competition.
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Li Bin-Qiao
Li Zhi-Jian
Shi Bing-Xue
Downs Robert W.
Smith Jeffrey
United Microelectronics Corp.
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