Patent
1985-07-08
1987-04-21
James, Andrew J.
357 47, 357 48, 357 52, H01L 2722
Patent
active
046600655
ABSTRACT:
A semiconductor Hall effect device having a stable and more controllable offset voltage is formed, in one embodiment, of an N-type silicon epitaxial layer overlying a P-type silicon substrate, and a P+-type region is formed, for example, by ion implantation, in the surface of the epitaxial layer over the active area of the Hall element. The P+-type region effectively shields the surface of the Hall element to prevent induced surface potential variations. Current and voltage sense contacts are provided by N+-type regions which penetrate through the P+-type shield region to contact the N-type epitaxial layer.
REFERENCES:
patent: 3823354 (1974-07-01), Janssen
patent: 3852802 (1974-12-01), Wolf et al.
Carvajal Fernando D.
Trogolo Joe R.
Bachand Richard A.
James Andrew J.
Merrett N. Rhys
Mintel William A.
Sharp Melvin
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