Half-rail differential driver circuit

Miscellaneous active electrical nonlinear devices – circuits – and – Signal converting – shaping – or generating – Current driver

Reexamination Certificate

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Details

C327S112000, C326S026000, C326S027000

Reexamination Certificate

active

07030664

ABSTRACT:
A half-rail differential driver circuit comprises a differential line pair, a high line and a low line, that are charged to half a first supply voltage, typically VDD, by shorting the high output line to the low output line during the pre-charge phase. The half-rail data lines are then pulled up or down during the evaluation phase. Since, according to the present invention, the switching differentials are only half-rail, the coupling capacitance is reduced by half. In addition, since according to the invention, the half-rail differential driver circuit employs a differential line pair, the return path is confined within the differential line pair, virtually eliminating the loop area and therefore virtually eliminating inductive coupling.

REFERENCES:
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patent: 5859548 (1999-01-01), Kong
patent: 6028454 (2000-02-01), Elmasry et al.
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patent: 6229745 (2001-05-01), Nambu et al.
patent: 6373763 (2002-04-01), Taito et al.
patent: 2001/0008497 (2001-07-01), Horiguchi et al.
patent: 2002/0000624 (2002-01-01), Takemura et al.
patent: 2004/0170050 (2004-09-01), Itoh et al.
Choe et al., “Dynamic Half Rail Differential Logic for Low Power”, IEEE 1997, pp. 1936 to 1939.
Jung et al., “Modular Charge Recycling Pass Transistor Logic (MCRPL)”, Electronics Letters, Mar. 2, 2000 vol. 36 No. 5, pp. 404 to 405.
Kong et al., “Charge Recycling Differential Logic for Low-Power Application”, ISSC96 secession 18, IEEE 0-780331962/98, 1998, pp. 302 to 448.
Choe et al., “Half Rail Differential Logic”, ISSCC97/Secession 25/Processors and Logic/Paper SP 25.6 IEEE 0-7803-3721-2/97, 1997, pp. 420 to 421, 336 to 337 and 489.
Won et al., “Modified Half Rail Differential Logic for Reduced Internal Logic Swing”, IEEE 0-7803-4455-3/98, 1998, pp. II-157 to II-160.
Kong et al., “Charge Recycling Differential Logic (CRDL) for Low-Power Application”, IEEE Journal of Solid-State Circuits, vol. 31, No. 9, Sep. 1996, pp. 1267 to 1276.

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