Guild array multiplier for binary numbers in two's complement no

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G06F 752

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active

047062100

ABSTRACT:
The invention concerns a Guild array multiplier for two's complement notation. Three major cell types are used as building blocks in the array, the cells differing by a simple carry circuit only.

REFERENCES:
patent: 4432066 (1984-02-01), Benschop
patent: 4616330 (1986-10-01), Betz
Pekmestzi et al., "A Two's Complement Cellular Array Multiplier", The Radio & Electronic Engineer, vol. 51, No. 2, pp. 94-96, Feb. 1981.
Isbery, "Electronic Switching Circuits for Multiplication", IBM Tech. Disclosure Bulletin, vol. 8, No. 2, Jul. 1965, pp. 258-259.
Dadda, "Some Schemes for Parallel Multipliers", Alta Frequenza, vol. XXXIV, No. 5, pp. 349-356, 1965.
Deverell, "Pipeline Iteratire Arithmetic Arrays", IEEE Trans. on Computers, Mar. 1975, pp. 317-322.

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