Guided probe system and method for at-speed PC board testing

Details Guided probe system and method for at-speed PC board testing Guided probe system and method for at-speed PC board testing

1987-05-21

1989-01-03

Smith, Jerry

Excavating

324 73R, 324 73AT, 371 1, 371 25, G01R 3128

Patent

active

047962593

ABSTRACT:
A guide probe test system for isolating faults in PC boards performs a "variable time domain" analysis by comparing probed data with stored reference data of waveforms of a known good UUT (unit under test) that are augmented by (1) insertion of shift coefficients to compensate for non-synchronization of the probed data with a start event, and (2) insertion of jitter coefficients to compensate for timing variations in the probed data due to allowable component propagation delay tolerances and/or an asynchronous clock. The insertion of the shift and jitter coefficients creates failure ranges within which mismatches of the probed data with the reference data are treated as possible rather than absolute failures. The UUT is partitioned into measurement sets containing nodes with common stimulus and synchronization to allow the analysis to break feedback loops and isolate faulty components. Use of the analysis is disabled when tracking faults across a measurement set and is re-enabled for further probing within a new measurement set. Insertion of shift and jitter coefficients into the stored reference waveform data for each node to produce failure ranges for each transition is accomplished by storing waveform data for that node from a good UUT, and determining the number of clock pulses by which transitions of that waveform may vary for multiple probings of that node, and by probing the corresponding nodes of multiple known good UUTs to determine the number of clock pulses by which each transition of that waveform may vary due to board-to-board variations. The failure ranges are fed to a probabilistic search routine that controls guided probing of the UUT. The system accomplishes at-speed fault isolation of UUTs containing multiple non-synchronized time bases.

REFERENCES:
patent: 4139147 (1979-02-01), Franke
patent: 4194113 (1980-03-01), Fulks et al.
patent: 4574354 (1986-03-01), Mihalik et al.
patent: 4709366 (1987-11-01), Scott et al.

Affiliated with

Also associated with

Rating

Guided probe system and method for at-speed PC board testing does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Guided probe system and method for at-speed PC board testing, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Guided probe system and method for at-speed PC board testing will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2173576