Guard ring for improved matching

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal

Reexamination Certificate

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C438S160000, C438S942000, C438S947000, C438S950000, C257SE21240, C257SE21259

Reexamination Certificate

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07407824

ABSTRACT:
A semiconductor manufacturing method comprises forming a leveling guard ring defining an interior area into which are fabricated one or more devices. In certain embodiments two or more matched devices, such as in a common centroid layout, are fabricated in the interior area. The guard ring is formed on at least one particular layer for a particular processing step. By the guard ring overwhelming the effect of local features' elevation differences, photoresist thereafter applied consequently has a more uniform height across the interior area, resulting in more uniform devices.In some embodiments, a plurality of guard rings enclosing respective arrays of matched devices are arranged over the surface of a semiconductor wafer, spaced apart so as to be not local to one another. Based on the equalizing effect by each of the guard rings, the respective devices arranged in the interior areas are more evenly matched to equivalent devices in far-spaced guard rings. Thus, both local and global matching are achieved.

REFERENCES:
patent: 5965925 (1999-10-01), Kornachuk et al.
patent: 6646509 (2003-11-01), Sobel
patent: 2003/0228714 (2003-12-01), Smith et al.
patent: 2005/0189612 (2005-09-01), Hung et al.
patent: 59-161834 (1984-09-01), None
H.P. Tuinhout, “Design of Matching Test Structures” IEEE 1994, vol. 7, Mar. 1994, pp. 21-23.

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