Group III nitride compound semiconductor element and method...

Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal

Reexamination Certificate

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C438S024000, C438S036000, C438S037000, C438S046000, C438S047000

Reexamination Certificate

active

06716655

ABSTRACT:

This is a patent application based on a Japanese patent application No. 2001-168936 which was filed on Jun. 5, 2001 and which is incorporated herein by reference.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a Group III nitride compound semiconductor element which is produced through steps including a step of growing semiconductor crystals and a separation step for producing chips of the produced semiconductor wafer (semiconductor elements), and to a method for producing the Group III nitride compound semiconductor.
2. Background Art
As shown in FIG.
5
and as is widely known, when a Group III nitride compound semiconductor such as gallium nitride (GaN) grown on the Si(111) plane—serving as a crystal growth plane (crystal growth region)—of a silicon substrate is cooled to ambient temperature, a number of dislocations and cracks are generated in the grown semiconductor layer.
When a number of dislocations and cracks are generated in the grown layer (nitride semiconductor layer), a number of lattice defects, dislocations, deformation, cracks, etc., are generated in a device fabricated from the semiconductor layer, thereby deteriorating device characteristics.
In the case in which hexagonal GaN crystals are grown on a silicon substrate having a so-called diamond structure, the Si(111) plane—closest packing plane—is typically employed as a crystal growth plane. In the process in which a customary semiconductor element having a rectangular plane shape is formed through crystal growth on the Si(111) plane and a plurality of individual semiconductor elements (chips) are separated from the semiconductor wafer, at least two sidewalls of the semiconductor element are composed of two cleavable cutting planes. Thus, a scribing step becomes cumbersome or difficult, thereby prolonging a production time or tending to provide defective products having deteriorated device characteristics caused by cracks, etc. As a result, productivity cannot be enhanced.
In addition, when a customary semiconductor element of a rectangular shape is formed on the Si(111) plane, an allowance region for scribing in the aforementioned scribing step occupies a considerably large area of the semiconductor wafer, thereby failing to enhance semiconductor wafer utilization efficiency (yield).
SUMMARY OF THE INVENTION
The present invention has been accomplished in order to overcome the aforementioned drawbacks. Thus, an object of the present invention is to produce, at high efficiency, semiconductor elements which are formed of a high-quality crystalline semiconductor having low dislocation density and no cracks and which have excellent characteristics.
According to first means to overcome the above-described drawbacks, the present invention provides a method for producing a semiconductor element comprising growing a crystalline semiconductor A formed of a Group III nitride compound semiconductor on a crystal growth region provided on the Si(111) plane of a silicon substrate, the crystal growth region being limited in terms of its area by means of masking or a similar technique, wherein the entirety or a portion of the periphery of the crystal growth region generally coincides with an edge defined by the Si(111) plane and another crystal plane that is cleavable.
The semiconductor layer composed of the aforementioned crystalline semiconductor A may have a single-layer structure or a multi-layer structure.
As used herein, the term “Group III nitride compound semiconductor” generally refers to a 2-component, 3-component, or 4-component semiconductor having arbitrary compound crystal proportions and represented by Al
x
Ga
y
In
(1−x−y)
N (0≦x≦1; 0≦y≦1; 0≦x+y≦1). The “Group III nitride compound semiconductor” of the present invention also encompasses such species containing a p-type or n-type dopant.
In the present specification, the “Group III nitride compound semiconductor” also encompasses semiconductors in which the aforementioned Group III elements (Al, Ga, In) are partially substituted by boron (B), thallium (Tl), etc. or in which nitrogen (N) atoms are partially substituted by phosphorus (P), arsenic (As), antimony (Sb), bismuth (Bi), etc.
Examples of the p-type dopant which can be added include magnesium (Mg) and calcium (Ca).
Examples of the n-type dopant which can be added include silicon (Si), sulfur (S), selenium (Se), tellurium (Te), and germanium (Ge).
These dopants may be used in combination of two or more species, and a p-type dopant and an n-type dopant may be added simultaneously.
As described above, when the entire periphery of the crystal growth region is composed of edges each defined by two planes; i.e., the Si(111) plane and another crystal plane that is cleavable (or in other words, crystal plane of cleavage fracture), the entire sidewall of the silicon substrate belonging to each semiconductor element is exclusively composed of a cleavable silicon crystal plane. Thus, the scribing step is remarkably simplified, thereby shortening the production time, and defective products having deteriorated device characteristics caused by cracks, etc. can be decreased, leading to remarkable enhancement in productivity. In addition, cutting allowance required for scribing can be reduced considerably, leading to remarkable improvement of yield.
When an Si(1-10) crystal plane is employed as a cleavable crystal plane, the Si(1-10) crystal plane and a GaN(11-20) plane coincide, thereby reducing the amount of material rise at a peripheral portion of the crystal growth region. Thus, the crystal growth plane of the wafer can be further flattened, thereby increasing the yield of flat portions.
In contrast to the case in which a customary rectangular (generally rectangle) growth region is provided, according to the present invention, the growth rate is substantially uniform over the entire peripheral portion of the crystal growth region, since all edges surrounding the crystal growth region are composed of equivalent planes; i.e., [1-10]. Thus, the thickness of the growth layer at the peripheral portion of the crystal growth region becomes substantially uniform, and therefore, the width of the emission wavelength (half-value (emission intensity) width of the emission wavelength) decreases, to thereby enable production of a light-emitting element having an emission wavelength with small variation and an intense emission peak.
In the aforementioned first aspect, the crystalline semiconductor A is preferably formed of a Group III nitride compound semiconductor represented by Al
x
Ga
y
In
(1−x−y)
N (0≦x≦1; 0≦y≦1; 0≦x+y≦1).
In the aforementioned first aspect, the crystal plane that is cleavable is preferably selected from a (-101) plane, a (1-10) plane, and a (01-1) plane of the aforementioned silicon substrate.
For example, as shown in
FIG. 1
, these three planes are selected in order to provide equilateral triangular crystal growth regions. The combination of these cleavable crystal planes is arbitrary. For example, as shown in
FIG. 2
, when equilateral triangular crystal growth regions are provided, those arranged in opposite orientations (i.e., those whose orientations differ by 180°) can be provided.
By employing such cleavable crystal planes serving as sidewalls of a semiconductor element, a scribing step can be simplified.
However, the sides of the periphery of one light-emitting element are not necessarily provided simultaneously from all the three planes. When at least one side of the periphery of the light-emitting element is composed of the aforementioned edge, the aforementioned advantages are attained to at least some extent. For example, a light-emitting element may have a right triangle plane shape having a top angle of approximately 60°, and two sides forming the angle may be composed of the aforementioned edge. Through employment of such a plane shape, the aforementioned advantages are also attained to an extent similar to or greater than that attained above.
In the first aspect, the afore

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