Group III nitride based flip-chip intergrated circuit and...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For high frequency device

Reexamination Certificate

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C257S744000, C257S532000, C257S533000

Reexamination Certificate

active

06825559

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to nitride based semiconductor devices, and more particularly to nitride based power devices that are flip-chip mounted on circuit substrates having passive components and/or pre-stage amplifiers.
2. Description of the Related Art
Microwave systems commonly use solid state transistors as amplifiers and oscillators, which has resulted in significantly reduced system size and increased reliability. To accommodate the expanding number of microwave systems, there is an interest in increasing their operating frequency and power. Higher frequency signals can carry more information (bandwidth), allow for smaller antennas with very high gain, and provide radar with improved resolution.
Field effect transistors (FETs) and high electron mobility transistors (HEMTs) are common solid state transistors that can be fabricated from semiconductor materials such as Silicon (Si) or Gallium Arsenide (GaAs). One disadvantage of Si is that it has low electron mobility (approximately 1450 cm
2
/V-s), which produces a high source resistance. This resistance seriously degrades the high performance gain otherwise possible from Si based HEMTs. [CRC Press,
The Electrical Engineering Handbook
, Second Edition, Dorf, p.994, (1997)]
GaAs is also a common material for use in HEMTs and has become the standard for signal amplification in civil and military radar, handset cellular, and satellite communications. GaAs has a higher electron mobility (approximately 6000 cm
2
/V-s) and a lower source resistance than Si, which allows GaAs based devices to function at higher frequencies. However, GaAs has a relatively small bandgap (1.42 eV at room temperature) and relatively small breakdown voltage, which prevents GaAs based HEMTs from providing high power.
Improvements in the manufacturing of Group-III nitride based semiconductor materials such as gallium nitride (GaN) and aluminum gallium nitride (AlGaN) has focused interest on the development of AlGaN/GaN based devices such as HEMTs. These devices can generate large amounts of power because of their unique combination of material characteristics including high breakdown fields, wide bandgaps (3.36 eV for GaN at room temperature), large conduction band offset, and high saturated electron drift velocity. The same size AlGaN/GaN amplifier can produce up to ten times the power of a GaAs amplifier operating at the same frequency.
U.S. Pat. No. 5,192,987 to Khan et al. discloses AlGaN/GaN based HEMTs grown on a buffer and a substrate, and a method for producing a HEMT. Other HEMTs have been described by Gaska et al., “High-Temperature Performance of AlGaN/GaN HFET's on SiC Substrates,”
IEEE Electron Device Letters
, Vol. 18, No 10, October 1997, Page 492; and Wu et al. “High Al-content AlGaN/GaN HEMTs With Very High Performance”,
IEDM
-1999
Digest
pp. 925-927, Washington D.C., December 1999. Some of these devices have shown a gain-bandwidth product (f
T
) as high as 100 gigahertz (Lu et al. “AlGaN/GaN HEMTs on SiC With Over 100 GHz f
t
and Low Microwave Noise”,
IEEE Transactions on Electron Devices
, Vol. 48, No. 3, March 2001, pp. 581-585) and high power densities up to 10 W/mm at X-band (Wu et al., “Bias-dependent Performance of High-Power AlGaN/GaN HEMTs”,
IEDM
-2001, Washington D.C., Dec. 2-6, 2001)
Group-III nitride based semiconductor devices are often fabricated either on sapphire or SiC substrates. One disadvantage of sapphire substrates is that they have poor thermal conductivity and the total power output of devices formed on sapphire substrates can be limited by the substrate's thermal dissipation. Sapphire substrates are also difficult to etch. SiC substrates have higher thermal conductivity (3.5-4 w/cmk) but have the disadvantages of being expensive and not available in large wafer diameters. Typical semi-insulating SiC wafers are two inches in diameter and if the active layers of a transistor are formed on the wafer along with the passive components, interconnections, and/or pre-stage amplifiers, the yield in number of devices per wafer is relatively low. This reduced yield adds to the cost of fabricating Group III transistors on SiC substrates.
Galluim arsenide (GaAs) and silicon (Si) semi-insulating wafers are available in larger diameters at a relatively low cost compared to the smaller diameter SiC wafers. GaAs and Si wafers are easier to etch and have low electrical conductivity. Another advantage of these wafers is that deposition of semiconductor devices and other processing can be conducted at a commercial foundry, which can reduce cost. One disadvantage of these wafers is that they cannot be easily used as a substrate for Group-III nitride based devices because the lattice mismatch between the materials leads to poor quality semiconductor devices. Another disadvantage of these wafers is that they have low thermal conductivity.
SUMMARY OF THE INVENTION
The present invention provides an integrated circuit and a method of fabricating an integrated circuit that uses higher cost, smaller diameter wafers in combination with lower cost, larger diameter wafers to produce lower cost integrated circuits at a higher yield. The active semiconductor devices and terminals are formed on a wafer that is higher cost and not available in larger diameters. To avoid consuming space on the higher cost wafer, the passive components, pre-stage amplifiers, and/or interconnects, are formed on a wafer of lower cost that is available in larger diameters. The active semiconductor devices are then flip-chip mounted in connection with the components on the lower cost, larger diameter wafers.
One method of fabricating an integrated circuit according to the present invention comprises forming a plurality of active semiconductor devices on a wafer, each of said semiconductor devices comprising at least two layers of semiconductor material with terminals electrically contacting the layers. Bonding pads are formed on at least one of the terminals on each of the wafer's active semiconductor devices and the active semiconductor devices are separated. Passive components and interconnections are then formed on a surface of a circuit substrate and at least one conductive via is formed through the circuit substrate. At least one of the active semiconductor devices is flip chip mounted on the circuit substrate with at least one of the bonding pads in electrical contact with one of the conductive vias.
One embodiment of a flip-chip integrated circuit according to the present invention comprises a circuit substrate having passive components and interconnections on one surface with at least one conductive via through the circuit substrate. An active semiconductor device is included which has a substrate with layers of semiconductor material and at least one terminal formed on it. At least one terminal is included in electrical contact with at least one of the layers. The active semiconductor device is flip-chip mounted on the circuit substrate with one of the at least one vias in contact with one of the at least one terminals.
The present invention is particularly applicable to Group III nitride based active semiconductor devices grown on a SiC substrate, and then separated into individual devices. The passive components, pre-stage amplifiers and interconnects can then be formed on a lower cost, higher diameter wafer made of GaAs or Si, or can be formed on other electrically insulating substrates. After separation, one or more of the Group III devices can be flip-chip mounted on the GaAs or Si substrate.
These and other further features and advantages of the invention would be apparent to those skilled in the art from the following detailed description, taking together with the accompanying drawings, in which:


REFERENCES:
patent: 5192987 (1993-03-01), Khan et al.
patent: 5949140 (1999-09-01), Nishi et al.
patent: 0938139 (1999-08-01), None
patent: 2136203 (1984-09-01), None
Gaska et al. High-Temperature Performance of AlGaN/GaN HFETs On SiC Substrates, IEE Electron Device Letters

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