Ground plane for integrated circuit package

Details Ground plane for integrated circuit package Ground plane for integrated circuit package

2006-12-26

2006-12-26

Potter, Roy (Department: 2822)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

Reexamination Certificate

active

07154175

ABSTRACT:
An integrated circuit package includes a first chip and a folded flexible substrate. The flexible substrate has a first surface and an opposing second surface and is disposed to partially surround the first chip. A first routing layer is formed on the first surface of the flexible substrate and a second routing layer is formed on the second surface of the flexible substrate. A metal ground plane is formed on a selected one of the first and the second surfaces.

REFERENCES:
patent: 6600222 (2003-07-01), Levardo
patent: 8600222 (2003-07-01), Levardo
patent: 2003/0232519 (2003-12-01), Chien
patent: 2005/0012194 (2005-01-01), Jaeck

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