Ground bounce blocking output buffer circuit

Electrical transmission or interconnection systems – Nonlinear reactor systems – Parametrons

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Details

307451, 307594, H03K 1716, H03K 1920

Patent

active

051499916

ABSTRACT:
An output buffer circuit incorporates a ground bounce blocking circuit which blocks transfer of ground bounce pulses from the output ground lead (GND,PGND) to the output (V.sub.OUT) for protecting quiet outputs tied to a common ground bus. A diode element (SD1,D1,ND1, NSC) is coupled in the sinking current path in series with the primary pulldown transistor element (N1,N1P) between the buffer circuit output (V.sub.OUT) and the ground rail (GND,PGND). The diode element is oriented for passing sinking current to the low potential ground rail and for blocking transfer of ground bounce pulses originating in the ground rail (GND,PGND) to the output. The ground rail may be bifurcated to provide a relatively noisy output ground lead (PGND) and a relatively quiet ground lead (QGND). The primary pulldown transistor element (N1P) is coupled to the relatively noisy output ground lead (PGND). A secondary pulldown transistor element (N1S) is also provided with the control nodes of the primary and secondary pulldown transistor elements (N1P),N1S) coupled to each other. The secondary pulldown transistor element (N1S) is coupled between the output (V.sub.OUT) and relatively quiet ground lead (QGND) and discharges a secondary sinking current for pulling down and maintaining the potential at the output (V.sub.OUT) substantially at ground zero potential. Other ground bounce blocking circuit configurations are described for MOS, bipolar and BICMOS output buffer circuits.

REFERENCES:
patent: 4864164 (1989-09-01), Ohshima et al.
patent: 4883978 (1989-11-01), Ohshima et al.
patent: 4942398 (1990-07-01), Peterson
patent: 4975600 (1990-12-01), Tran et al.
patent: 5015889 (1991-05-01), Reay
patent: 5049763 (1991-09-01), Rogers

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