Grooved semiconductor die for flip-chip heat sink attachment

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – With provision for cooling the housing or its contents

Reexamination Certificate

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C257S707000, C257S712000, C257S706000, C257S738000, C257S737000, C257S778000, C257S713000, C257S779000, C257S782000, C257S783000

Reexamination Certificate

active

06225695

ABSTRACT:

TECHNICAL FIELD
This invention relates generally to semiconductor packaging technology, and more particularly, to techniques for attaching heat sinks in semiconductor packages. Still more particularly, the invention relates to the attachment of heat sinks in flip-chip semiconductor packages.
BACKGROUND OF THE INVENTION
The amount of heat generated by a semiconductor device, or chip, is related to the number of transistors on the device and the clock speeds at which they are operated. As more and more transistors are fabricated onto a single semiconductor device, the overall amount of heat generated by the device is increased. Similarly, the faster the transistors on the chip are operated, the more heat is generated by the device. Since advances in semiconductor fabrication technology continue to make possible both increased transistor density and higher clock speeds, the problem of heat generation is becoming increasingly severe, particularly in high performance devices which push the limits of fabrication technology.
As an increasing amount of heat is generated by the device, the junction temperatures of the transistors in the device increases proportionately. The failure rate of a semiconductor device is directly related to the junction temperature at which it is operated. The higher the junction temperature, the higher the failure rate.
It is generally known to provide a heat spreader or heat sink for a semiconductor device in order to transfer the generated heat away from the device itself and into the surrounding air, thus reducing the junction temperature. Heat sinks generally are located as physically close to the semiconductor device as possible in order to maximize the amount of heat transferred. Heat sinks typically are constructed from a high thermal conductivity material, such as copper, aluminum or high thermal conductivity plastic, and are designed to present a maximum amount of surface area to the ambient air in order to allow the heat generated by the semiconductor device to be removed, either by natural or forced convection.
One way that heat sinks increase the amount of surface area available for heat dissipation is to provide a plurality of parallel cooling fins which rise vertically from a horizontal surface, or base member. One conventional heat sink is shown in FIG.
1
A. In this example, the heat sink
100
includes a base member
102
, having a base surface
103
which is attachable to a corresponding surface of the semiconductor package. Heat sink
100
is also provided with a heat dissipating surface
105
. In this case, the surface
105
includes fins
104
a
,
104
b
,
104
c
and
104
d
which provide greater surface area for convection cooling. Other designs include a plurality of cooling pins which rise from the base member. Numerous types of pins are known in the art having cross-sections of various shapes. Forced convection may be provided by a fan which passes air over a circuit board to which the packaged semiconductor is mounted, or, in some cases, a fan may be mounted directly onto the top of the heat sink fins themselves.
However, although heat sinks are effective in removing heat generated by a semiconductor die, attaching the heat sinks to the dies, or packages in a thermally efficient manner presents difficulties for semiconductor package designers. For example,
FIG. 1B
shows a cross-sectional view of a conventional encapsulated semiconductor package. The package
100
comprises a package substrate
102
having a plurality of solder balls
112
mounted to its lower surface. Solder balls
112
are used for providing electrical connection to a printed circuit board (not shown). A semiconductor die
106
is mounted to the upper surface of the package substrate
102
by a die attach material, such as epoxy,
114
. Electrical connection between the circuit elements on the active surface of the die
106
and conductive traces on the package substrate
102
are provided by bond wires
108
. An encapsulant
104
covers the die
106
and bond wires
108
in order to prevent damage to the package when it is handled and installed on the printed circuit board. This type of packaging is sometimes referred to as “glob-top” packaging due to the presence of the encapsulant
104
. This type of packaging is desirable due to its low cost, however, the thermal performance of encapsulated packages are poor because the encapsulant
104
has a low thermal conductivity which prevents good heat transfer between the semiconductor die
106
and a heat sink which may be attached to the package.
One solution to the above problem is to provide a direct connection between the heat sink and the semiconductor die. This can be accomplished by the use of “flip-chip” packaging. A cross-sectional view of a conventional flip-chip package is shown in FIG.
2
. In this case, the package
200
includes a package substrate
202
having a number of electrically conductive solder balls
206
formed on its lower surface to provide electrical contact between the package
200
and a printed circuit board (not shown). A semiconductor die
210
is mounted to the upper surface of the package substrate
202
by a number of solder bumps
214
which are formed on bond pads on the active surface of the semiconductor die
210
. An underfill material
212
is provided to encapsulate and protect the solder bumps
214
. Thus, it is noted that unlike the encapsulated package shown in
FIG. 1B
where the active surface of the die faces away from the package substrate, in a flip-chip package the active surface of the die is “flipped” so that it faces the upper surface of the package substrate.
The non-active surface of the semiconductor die
210
is now available to provide a direct connection between the die
210
and a heat sink. In the example shown in
FIG. 2
, the non-active surface of the semiconductor die
210
is attached to a heat sink
204
by an epoxy adhesive
208
. This arrangement allows greater heat transfer between the semiconductor die
210
and the heat spreader
204
, thus providing the package with improved thermal performance.
However, although thermal performance is improved, the flip-chip package illustrated in
FIG. 2
suffers from several disadvantages. For example, the mechanical strength of the bond is a factor of the size of the die, the type of adhesive used, the thickness of the adhesive, and the surface finishes of the die and heat sink. These factors serve to limit the efficiency of the heat conduction between the die and the heat sink. Moreover, when the die is attached to the package substrate in the flip-chip configuration, the differences in thermal expansion of the silicon and heat sink material results in mechanical stresses on the die. For a large die, this can cause fracturing when the package is temperature cycled during use.
As semiconductor processing technology advances, the die size tends to shrink but at the same time the power dissipation of the die increases. Thus, the attachment of the heat sink to the die becomes increasingly important to device performance. Accordingly, it is an object of the invention to overcome the above mentioned problems. It is a further object of the invention to provide improved techniques for attaching a semiconductor device to a heat sink in a flip-chip configuration. Still further objects and advantages of the present invention will become apparent in view of the following disclosure.
SUMMARY OF THE INVENTION
One aspect of the invention relates to a semiconductor die useful in flip-chip packaging. In one embodiment, the semiconductor die comprises an active surface having a plurality of circuit elements and bond pads formed thereon, and a non-active surface attachable to a heat sink, the non-active surface having a plurality of grooves formed thereon.
Another aspect of the invention relates to a flip-chip semiconductor package. In one embodiment, the flip-chip semiconductor package comprises a package substrate having an upper surface, a lower surface and a plurality of conductive traces, the upper surface having an u

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