Groove structure for isolating elements comprising a GTO structu

Active solid-state devices (e.g. – transistors – solid-state diode – Physical configuration of semiconductor

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257149, 257622, 257623, 257626, H01L 2906, H01L 2974, H01L 31111

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active

052818470

ABSTRACT:
A semiconductor structure comprises a gate-turn-off thyristor region (GR) and a diode region (DR) with an isolation area (SR) therebetween. The isolation area is provided with a multistage groove (30) having step structures (34,35). The multistage groove is formed through a two-stage etching process, and over-etched regions in the bottom corners of the multistage groove are relatively shallow ones. This structure is effective for increasing the breakdown voltage of the semiconductor structure and isolations between a the gate-turnoff thyristor region and the diode region.

REFERENCES:
patent: 4047219 (1977-09-01), Temple
patent: 4742382 (1988-05-01), Jaccklin
patent: 4808550 (1989-02-01), Fukushima
Vol. 6, No. 251 (E-147)(1129) Dec. 10, 1982, Patent Abstracts of Japan JP 57148371, Sep. 13, 1982.
International Electron Devices Meeting 1981--Technical Digest, Dec. 1981, pp. 410-413, Washington, DC, John X, Przybysz and Earl S. Schlegel "Thrystors with Overvoltage Self-Protection", p. 411.
EPE '89 3rd European Conference On Power Electronics and Applications, Oct. 1989, Aachen, Germany, pp. 121-125, M. Ishidoh et al., "A New Reverse Conducting GTO".
IBM Technical Disclosure Bulletin, vol. 31, No. 7, Dec. 1988, New York, pp. 420-422, "Accelerated Etching of Silicon in Anisotropic Ethylene Diamine-Water-Pyrazine-Pyrocatheol Bath".

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