Computer-aided design and analysis of circuits and semiconductor – Integrated circuit design processing – Physical design processing
Reexamination Certificate
2008-09-25
2011-10-11
Chiang, Jack (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Integrated circuit design processing
Physical design processing
C716S122000, C716S126000
Reexamination Certificate
active
08037441
ABSTRACT:
A computerized method for automatically generating a grid-based derivative of a non-gridded cell library of an integrated circuit design comprises the step of determining at least one valid position of at least one wiring element of a circuit of the first cell library, wherein the at least one valid position fulfills all technological design rules and wherein the at least one valid position fits into the second grid format. The method can also be used for automatically transforming a first cell library of an integrated circuit design having a first grid format into a second cell library having a second grid format or for automatically analyzing a grid-based cell library of an integrated circuit design in view of the circuit quality regarding technical design rules.
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“Routing Requirements for the Nanometer Era”—White Paper of Cadence Design Systems, Inc., San Jose, CA, USA published in 2004.
Muuss Karsten
Ringe Matthias
Chiang Jack
Dimyan Magid
International Business Machines - Corporation
Schnurmann H. Daniel
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