Grid metal design for large density CMOS image sensor

Details Grid metal design for large density CMOS image sensor Grid metal design for large density CMOS image sensor

2004-09-20

2008-10-07

Pert, Evan (Department: 2826)

Active solid-state devices (e.g., transistors, solid-state diode

Responsive to non-electrical signal

Electromagnetic or particle radiation

C257S292000, C257S233000, C257S257000, C257S258000, C257SE27133

Reexamination Certificate

active

07432576

ABSTRACT:
A new grid metal design for image sensors is disclosed which is comprised of a semiconductor image sensor chip having a pixel region covering most of the chip and a logic circuit region on the chip periphery. The pixel region contains, an array of image pixels where for each image pixel the majority of its area is occupied by a light sensing element and the other image pixel circuit elements are arranged in the periphery of the image pixel without overlapping the image-sensing element. A number of metal levels are of the first type, at which functional metal patterns exist both for the chip peripheral logic circuits and for the pixel circuit elements. A number of metal levels are of the second type, at which functional metal patterns exist only for the chip peripheral logic circuits and dummy metal patterns cover the pixel region except for the light sensing elements. A first dielectric layer is disposed under the first metal layer, an interlevel dielectric layer between metal levels of either type and a passivation layer over the last metal level.

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