Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration
Reexamination Certificate
2006-02-14
2006-02-14
Thai, Luan (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified configuration
C257S774000, C257S786000, C257S738000
Reexamination Certificate
active
06998715
ABSTRACT:
Grid array electronic component, wiring-strengthening method and producing method wherein a grid array electronic component in which a grid array LSI chip2having a large number of lands3connected to a large number of lands13through connecting means30, the lands13are connected to a wire4of a printed wiring board1, an auxiliary land5is formed at a connection portion31of the lands13on the printed wiring board1corresponding to the lands3of a corner portion of the grid array LSI chip2connecting the wire4and the concentration of stress of the connection portion31is moderated, thereby providing the effect that the brake of the wire in the connection portion31is prevented.
REFERENCES:
patent: 5784262 (1998-07-01), Sherman
patent: 5815374 (1998-09-01), Howell
patent: 6091155 (2000-07-01), Jonaidi
patent: 6218630 (2001-04-01), Takigami
patent: 8-78825 (1996-03-01), None
patent: 11-97575 (1999-04-01), None
Fuji Shouichi
Nakao Akira
Oblon & Spivak, McClelland, Maier & Neustadt P.C.
Suzuka Fuji Xerox Co., Ltd.
Thai Luan
LandOfFree
Grid array electronic component, wire reinforcing method for... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Grid array electronic component, wire reinforcing method for..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Grid array electronic component, wire reinforcing method for... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-3689382